design mistake "sequential type is unconnected in block"

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eng.fedail

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In my design I'm assigning an output of block to a FF before feed it back to next block. it's working ok with me with the data vector but with a single variable is not working, I have tried to implement it in different case and I do still have the same problem

here is how I'm defining my instances

Code: 
ALU1: entity work.CC_1 port map(S(11),S(10),Cin,S(9 downto 8),A,B,oTemp1,ocTemp(0));
ALU2: entity work.CC_1 port map(S(7),S(6),iTemp1(4),S(5 downto 4),iTemp1(3 downto 0),C,oTemp2,ocTemp(1));
ALU3: entity work.CC_1 port map(S(3),S(2),iTemp2(4),S(1 downto 0),iTemp2(3 downto 0),D,oTemp3,ocTemp(2));

and here is the loop when I assign the data and the signals

Code: 
for i in 0 to 2 loop
	case i is
	when 0 =>
		iTemp1(3 downto 0) <= oTemp1;
		iTemp1(4) <= ocTemp(0);
	when 1 =>
		iTemp2(3 downto 0) <= oTemp2;
		iTemp2(4) <= ocTemp(1);
	when 2 =>
		Dout <= otemp3;
		Cout <= ocTemp(2);
	when others => null;
		end case;
end loop;

the errors are


 
Last edited:

Some more snippets would help to understand the problem.
 

I got rid of all the warning messages by re-configuring the instance structure. but still in RTL cout is not connected as expected
attached is a snap

updated code is

Code: 
ALU1: entity work.CC_1 port map(S(11),S(10),Cin,S(9 downto 8),A,B,oTemp1,ocTemp1);
ALU2: entity work.CC_1 port map(S(7),S(6),iTemp1(4),S(5 downto 4),iTemp1(3 downto 0),C,oTemp2,ocTemp2);
ALU3: entity work.CC_1 port map(S(3),S(2),iTemp2(4),S(1 downto 0),iTemp2(3 downto 0),D,oTemp3,ocTemp3);

Code: 
for i in 0 to 2 loop
				case i is
					when 0 =>
						iTemp1 <= ocTemp1 & oTemp1;
					when 1 =>
						iTemp2 <= ocTemp2 & oTemp2;
					when 2 =>
						Dout <= otemp3;
						Cout <= ocTemp3;
					when others => null;
					end case;
			end loop;
 

I am not sure what you are trying to do.
Your "for" loop is completely meaningless since you don't use "i" in it. The statements in the loop will have the same effect if you remove the loop and the null statement.

One advice, don't use positional port mapping. Sooner or later you will get the connections wrong and spend a lot of time debugging it. Use named port mapping and put only one port per line.
 

This kind of warning occurs when you donot use your register anywhere, or your condition never reaches the assigned register
 

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