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design a Time delay circiut

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purpleanger

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Hi,

I'd like to design a circuit such that at first, the circuit is completely powered off. The user pushes a switch, which injects power into the circuit. Then a mechanism maintains the power active, even if the switch has been released. At a later about 3 seconds, when the circuit does no longer need power,
it cuts its own power and sleeps until the user chooses to push the
button again.

How can i design this circuit, do not use 555 timer.
Because of i wanna integrated this circuit in smart card.

Thanks.
 

You may use Super charge capacitor to keep the supply voltage up to 3Sec. depending upon the time, capacitance value may get change!

This is just a idea, we have to take care on designing the capacitor value and this is for simplicity.
 

Use R & C to generate the delay?
1Mohm * 1uF=~1S.
 

Did you consider using a counter IC which has an internal oscillator as CD4060?

Kerim
 

Thank about your reply Kerim

Tell me more information about that? please.
Thanks.
 

purpleanger said:
Thank about your reply Kerim

Tell me more information about that? please.
Thanks.
Click to expand...

I assume you can get its datasheet (the IC is a standard CMOS one).
Unfortunately I can't have one to test what we will talk about.

First, it is very important to know the state of all outputs of the counter. I hope, but I am not sure, that the IC resets itself (all outputs become low) anytime it is powered. But if the outputs will have a random state at a start then I am afraid we need to let its reset pin do the job much like we do for resetting some MCUs. In this case a capacitor (could be very small since the input is CMOS) is connected between Vcc and the reset pin (11) also a high value resistor between the pin and ground. So when Vcc is applied, the charging current of the capacitor will rise the pin voltage for a short time resetting all outputs.

Could you check this?
Please note that in case the IC can always reset itself at powerup pin 11 should be grounded.

Kerim
 

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