The number os cores you can place in a FPGA is directly related to the amount of available logic you have.
So, it really depends of which FPGA you will chose inside 3E family. a XC3S100E hardly will support 4-cores, but a bigger FPGA may support it, depending of the complexity of the core.
Also, there is achoice to be done: if you suport external buses (for example, for parallel flashes, RAM) or will use internal BRAM only. If you use external buses, you increase core complexity. But if you use internal BRAM only you are very limitted regarding code size and RAM memory.
If you are trying to do this for learning purposes, good. But keep in mid you can reuse a core already developed. For example, there are some free cores available on opencores.org. They can be used as reference for your new core as well.
Good luck.