sabkumar.r
Junior Member level 2
I am using Quartus II version 9.1. I simulated the following code
`timescale 1 ns / 1 ps
module clk_gen(output reg clk);
initial
clk=0;
always
#2 clk = ~clk;
endmodule
I was expecting a clock waveform of period 4ns. But to my surprise, the waveform I got was always high. Can someone please explain?
`timescale 1 ns / 1 ps
module clk_gen(output reg clk);
initial
clk=0;
always
#2 clk = ~clk;
endmodule
I was expecting a clock waveform of period 4ns. But to my surprise, the waveform I got was always high. Can someone please explain?