deffernece between synchrouns FIFO and asynchrouns FIFO?

[vamsi_addagada]

synchrouns

deffernece between synchrouns FIFO and asynchrouns FIFO?

 

[laststep]

A synchronous FIFO is a FIFO where the same clock is used for both reading and writing.
An asynchronous FIFO uses different clocks for reading and writing

Guess you already understand what is synchronous FIFO,
so here is some link for the asynchronous FIFO:

for interfacing two clock domian
http://www.asic-world.com/tidbits/clock_domain.html

and for the asynchronous FIFO introduction
http://www.geocities.com/deepakgeorge2000/vlsi_book/async_fifo2.pdf

 

[master_picengineer]

Perhaps it is a definition.
Synchronous fifos are drived by a clock.
Asynchronous fifo are not drived by a clock, it uses a handshake protocol (2 or 4 phase) instead.

 

[darylz]

I also was confused by the difference of these definitions.

 

[vlsi_whiz]

Synchronous FIFOs have only a single clock for both Read and Write operations. Here, it is relatively easy to determine the FIFO depth and also to generate the Full and Empty flags.

However, in an Asynchronous FIFO, both the Read and Write operations are performed at Different Clocks. Hence you need to pay special attention to determine the depth of these FIFOs. More over, to generate the full and empty flags you need to synchronize the read and write pointers before comparing them.

 

[laststep]

For asychoronous FIFO, very often we will have the metastability problem, to overcome this problem we often use the dual stage synchronizer to synchronize the signal which is simply build using 2 flip-flop in cascade.