decoupling mos capacitor

[wylee]

comparing MIM cap to moscap(mos transistor), which device is more suitable to be used as on-chip decoupling capacitor?

 

[uladz55]

MIM cap is more stable for different voltages and has higher breakdown voltage.

MOSCAP can change his value depend on applied voltage (30%-50% near zero bias), but has much higher specific capacitance (about 10 times for 0.5um process) compare with MIM.

For process higher then 0.35um better u can use Me-Me fringe capacitance.

 

[jordan76]

From the perspective of area, mos cap is more appropriate for decoupling cap. Normally we do not care about the accuracy of decoupling cap if the decoupling capacitance is large enough for the specific application.

regards,
jordan76

 

[xinsu]

mos cap has high resistor per unit than MiM,in may experience, fewer use mos cap below 0.25um

 

[rfsystem]

Use MOS as decoupling. It has higher value and has more yield. You can insert spare cells into STD cells so you get an automatic decoupling. Use different gate lenghts so that the decoupling caps have an distributed series resistance which lowers the Q of the resonator. Check the impedance over frequency with an analog simulation.

 

[xinsu]

if you are not sure which one should be chose, you can discuss this issue with analog engineer

 

[SC3K01]

When you use MOSCAP in deep submicron, you should be careful that
1. the gate oxide is very sensitive to ESD, if you directly connect power to gat;
2. the leakage of MOSCAP is a critical issue;

 

[victoriya]

for cases that the linearity isn't critical the mos caps is preferable and require less than a quarter space need for mim cap.

 

[dick_freebird]

I prefer not to choose.

MOS caps have the density but also relatively higher
seies resistance, particularly the channel (bottom
plate). The finger layout can help this (square
aspect is not ideal). They are good for mid-frequency
bulk capacitance and the low Q keeps them from ringing
so much.

MIM caps, I usually get by bus construction (parallel
plates, poly/Met1/Met2 most often). These are for edge
current de-peaking, picking up the slack from the MOS
caps intra-cycle. Too much MIM cap can make for
internal supply ringing, too little makes for more rail
bump on clock edges.

MOS decoupling caps prefer to be low threshold, to
improve the stored charge total and the bottom plate
effective resistance. You might use thick ox caps on
the theory that rail-rail thin oxides have a rough life
ahead of them.

 

[leo_o2]

And MIM will need extra mask that will increase die cost. However, MOS cap don't need it.