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From the perspective of area, mos cap is more appropriate for decoupling cap. Normally we do not care about the accuracy of decoupling cap if the decoupling capacitance is large enough for the specific application.
Use MOS as decoupling. It has higher value and has more yield. You can insert spare cells into STD cells so you get an automatic decoupling. Use different gate lenghts so that the decoupling caps have an distributed series resistance which lowers the Q of the resonator. Check the impedance over frequency with an analog simulation.
MOS caps have the density but also relatively higher
seies resistance, particularly the channel (bottom
plate). The finger layout can help this (square
aspect is not ideal). They are good for mid-frequency
bulk capacitance and the low Q keeps them from ringing
MIM caps, I usually get by bus construction (parallel
plates, poly/Met1/Met2 most often). These are for edge
current de-peaking, picking up the slack from the MOS
caps intra-cycle. Too much MIM cap can make for
internal supply ringing, too little makes for more rail
bump on clock edges.
MOS decoupling caps prefer to be low threshold, to
improve the stored charge total and the bottom plate
effective resistance. You might use thick ox caps on
the theory that rail-rail thin oxides have a rough life
ahead of them.