Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hello, first it is not the rule using electroilitic capacitors, the most common is use ceramic capacitors and other special capacitors. for decoupling.
Decoupling is a means of overcoming physical and time constraints found usually in a Power Distribution System (PDS) of a digital circuit. Simply put, decoupling reduces switching noise in the PDS.
The rule of thumb to use a 0.1-µF capacitor on the power pin of a semiconductor device is rapidly fading away.
a decoupling capacitor , provides very low impedance.
since the capacitor impedance is dependent on frequency,
(1/(2*pi*f*C) , a decoupling capacitor is designed for action at certain freq.
(above the designed freq , it is giving essentilly very less impedance)
so , the cap value is calculated based on the freq and impedance reqd.
it is not that only electrolytic or ceramic , only the value is important.
in general , if the 'f' is very low , you get very large value of c and it is available in electolytic types.
if 'f' is high , you have low c and that is available in ceramic.
Elctrolytics (inl tantalums) are bulk charge reservoirs.
They are for low frequency (baseband) ripple. Their
main virtue is density of capacitance / charge, not
quality of delivering it.
Ceramics are for high frequency "shorting" of the chip
"current loops". Your goal is to drive supply span
perturbations toward zero at the switching edges.
Look at your risetimes, turn that into a frequency and
get a SRF (well) greater than that number.