Decoupling capacitor/s value vs effective frequency coverage & anti-resonance.

[David_]

Hello.

This question relates to a(or all) hardware design of mine but it is partly simply a "I want to know why or what" situation in that all datasheets for ICs tell you where and what value and what kind of decoupling capacitor/s to use or in which range, according to the guidelines found on the web I should be fine as it is(power supply decoupled/bypassed with both high(10µF) and low(100nF) caps and then a 100nF cap at every IC.

I am thinking about a situation in which there are a high frequency SMPS followed by some analog and digital circuits on the same PCB separated as good as possible but the circuit does after all consists of both analog(linear regulator, op amps, voltage references, data converters) and digital(a µC & LCD stuff like that). The microcontroller(µC) communicate with the data converters with high-speed SPI ≈ slave1 = 5MHz, slave2 50MHz.

The SMPS is actually a low-frequency design(20kHz) but the µC does run with an internal oscillator of 32MHz, so the SPI 50MHz is below that(I am prototyping with a 86MHz controller(arduino) while are going to use a XMEGA in the end).

I'm sure one could say that to be sure I could but on every analog IC 2 or 3 decoupling caps of different values which is not specific but I want to know specifically.

If I have (and by the way I have so far meant ceramic capacitors, X7R and alike) a 10µF & a 100nF in parallel to decouple a IC, how can I estimate/work out/simulate what the frequency specifications that combo(or any other combo) could be expected to have and how do I take anti-resonance into consideration and is it relevant to do so?

How does I know what range of frequency's a capacitor value attenuate given that it has "appropriate standard" values of ESR and ESL?

I guess I want to look at how capacitors of different values/package sizes combine to decouple AC currents and get a understanding about this subject in general. I have acquired a Matlab student license and I am learning to use LTspice but I am unsure about what mathematics I need to know about or what simulation tools could be used to simulate this stuff.

I have a Analog Discovery or a set of scope/function generator to use to look at these capacitor combinations but they does not enable me to view small enough voltages but foremost they fall short in bandwidth so much its no use to even think about doing any practical evaluation other than low frequency.

I think that in practice this is not necessary to go into detail about but I really want to know about this stuff.

And about anti-resonance, there ESR and ESL is more important to be specific about but how do you even measure such values at say >10MHz. Is it even possible to prove any specific value at that high a frequency or is that just mathematical models that I one need to use and trust? In component datasheets one can see those diagrams depicting impedance and reactance changes over frequency and they range very high indeed.

Regards

 

[betwixt]

Re: Decoupling capacitor/s value vs effective frequency coverage & anti-resonance.

There is no exact science to it, there are so many parallel connections feeding power in and drawing out of a power line that the impedance and hence minimum usable value would be impossible to calculate. Instead, at least for low frequencies (< about 1GHz) we rely on the properties of the capacitors given in their data sheets from the manufacturers. The two important things to recognize are that large values generally mean electrolytic capacitors which for the most part use a spiral metal element and have wires to connect them, this makes them inductive and therefore less effective as the frequency is increased. The other is that although ceramic capacitors have lower inductance, they are difficult to manufacture in very large values. The parallel connection of a large value electrolytic for good low frequency operation and a ceramic for good high frequency operation is usually chosen.

The values depend on the amount of interference on the supply lines and it's frequency. In many cases it will be a complex waveform coming from several sources to trying to selectively filter it would be pointless, instead we tend to 'blanket' cover it all with values we are sure will work in all cases. The down side to 'over' decoupling is the extra component costs and the risk that the power supply may be overloaded if it has to simultaneously charge a lot of large value capacitors. Some common sense is needed.

For frequencies above about 1GHz the decoupling can be a little more complicated and it may be necessary to use an electrolytic, a conventional ceramic type and a leadless ceramic type together.

Brian

 

[D.A.(Tony)Stewart]

Re: Decoupling capacitor/s value vs effective frequency coverage & anti-resonance.

The important criteria in decoupling loads from affecting source ripple is the impedance ratio of load to source and rise time. If you convert rise time to frequency , the real ESR and reactive Zc and Zl of components and tracks can be compare to source, where decoupling caps of appropriate sizes help to lower source impedance to be 0.1-10 % of the load impedance, depending on the circuit's ripple effects.

Smaller size caps of same value have lower ESL, thus higher SRF, which is the lowest impedance or ESR of the chip.

It is needed close to pulsed loads of broad spectrum to reduce radiated loop current area.

Larger values provide for lower impedance in parallel with regulator source impedance, at lower frequencies and large pulse currents.

In the end, the transmission of load generated noise, is governed by this ESR+Zc impedance ratio of source/load that determines percentage of ripple expected.

Keep in mind Coss of Mosfets and CMOS is a switched load.

For source generated ripple LC impedance ratio offers good reduction, again looking at Zc/ZL ratio for spectral ripple, but LDO and band gap regulators offer the best impedance ratio due to buffered Zout being low until decoupling caps take over at high f.

best low ESR materials for GHz are mica and "plastic types" but limited to small values. "special ceramic exists for RF and not all are the same. Best are TDK,Murata and similar Japanese types.

 

[mrinalmani]

Re: Decoupling capacitor/s value vs effective frequency coverage & anti-resonance.

Hello!
Decoupling capacitors are used for for two purpose.
1. EMI reduction
2. Noise filtering.

Put simply, the first situation arises because power takes a finite amount of time to be transferred from one location to the other. It is transferred at the speed of light. The more the 'time' lag between the load and the source, more is the emission.
Power is supplied from different sources in the following order (lowest delay first)
1. On chip parasitic capacitance
2. Power plane capacitance
3. Local decoupling capacitance
4. Bulk source capacitance
This explains why GHz range PCBs are more and more multi-layered.

For noise filtering, there is no explicit relation between the capacitance value and the bandwidth that it can chop off.
Ideally we would want to use the largest and the cheapest available capacitor. So what is the problem?
The problem is that capacitors are not ideal. Larger the capacitor, larger is its internal inductance.
So Why cant we use small capacitors with lowest inductance?
We can't because small capacitors cant provide enough energy.
It is also interesting to note that higher frequency noise have less energy per wave and can be absorbed by smaller capacitors which are "fast enough" to respond to them.
Although larger capacitors can also absorb that energy, they are just not fast enough to absorb it. (Inductance slows down the capacitor)
On the other hand, lower frequency noise are "slow" in nature but contain more energy per wave as compared to HF noise. Small capacitors cannot absorb this.
It is therefore clear that we need a combination of capacitors for effective filtering, especially if the noise source is unknown.

"Johnsons dielectric" produces a series of four terminal ceramic capacitors than have an ultra low inductance and thus are very fast. The capacitors are not very expensive and can replace around three to four different valued conventional capacitors with just a single one.

As far as for simulation, modelling capacitors in series with their internal inductance will automatically result in the bandwidth that you are willing know.