decision of PCB layers

[mush]

Dear all,

I am currently designing a simple FMC board. The board receives and sends differential signals (max 320MHz) through mini sas connectors and sends them to a xilinx board through samtec ASP-134488-01 with the help of SN65LVDS122 translators. I want to ask you from your experience, which is the best "topology" for the layers? Do I have to use Top-GND-Signal-Signal-PWR-Bottom or it is better the GND-Signal-GND-PWR-Signal-GND (in this case probably the signal layers are not enough). Is it better to isolate the differential signals from the "outer world"? Is it better to use a ground plane on the side of the ASP-134488-01 because of the many ground pins? Generally, is there any rule for the decision of the planes?

Thank you,

Mush

 

[barry]

You are talking about "stripline" (sandwiched between two planes) versus "microstrip"(route on outer layer). Both will work, but there are tradeoffs. For example, routing on an internal layer might be easier versus trying to route on a layer with many components. But the geometry of the traces on the inner layer will be larger than on an outer layer for a given impedance.

 

[mush]

Dear Barry,

thanks for your reply. You are right about the tradeoffs. My concern is the integrity of the signals in the outer layers. In a "noisy" environment is it better to put planes in the outer layers or it doesn't worth to do that (also with the second topology in my first post...there are only 2 available routing layers)?

Thanks again,

Mush

 

[barry]

While routes on the outer layers are probably more susceptible to noise, the fact that LVDS is differential will eliminate a lot of the problem. You would have to generate a lot, I mean A LOT of noise for it to upset LVDS signals.

I'm not sure what your question about your second topology is. If you are saying there are two routing layers, then there are two routing layers; that's up to you. (But I have cheated and routed signals on power layers).

 

[ads-ee]

From what I've seen most high speed boards use 8 layers with either of these two topologies:

GND
SIG1
SIG2
GND
PWR
SIG3
SIG4
GND

or

SIG1 (TOP)
GND
SIG2
GND
PWR
SIG3
GND
SIG4 (BOTTOM)

The GND-PWR core improves the high frequency bypass capacitance of the board up into the GHz range.