spman
Advanced Member level 4
Hi
I want to use the DDR3 memory which is on the xilinx virtex6 board (ML605). So I downloaded the example design at the xilinx site and modifed it to write my data patterns into the memory. Actually I removed the data generator in the design and wrote a simple data generator myself.
I have a problem in simulation. When I issue a write command to the controller, data are written first at address 16 and then 24 for the next write command, then 32 and ... no matter what address I want to write in! For example I can't start from adress 32!
Could anybody help me please! I have scrambled with it for about 2 weeks! But doesn't work!
Or any other example?
Thanks in advance
I want to use the DDR3 memory which is on the xilinx virtex6 board (ML605). So I downloaded the example design at the xilinx site and modifed it to write my data patterns into the memory. Actually I removed the data generator in the design and wrote a simple data generator myself.
I have a problem in simulation. When I issue a write command to the controller, data are written first at address 16 and then 24 for the next write command, then 32 and ... no matter what address I want to write in! For example I can't start from adress 32!
Could anybody help me please! I have scrambled with it for about 2 weeks! But doesn't work!
Or any other example?
Thanks in advance