dc_shell error: loop exceeded maximum iteration limit

[lizeer]

rtl code;

parameter word_depth = 2048;

task x_mem;
integer n;
begin
for (n=0; n<word_depth; n=n+1)
mem[n]=wordx;
end
endtask


when I try to synthesis this code, dc_shell will give me this error:

Error: /project/gprs/asic/synthesis/TOP/APIU/source/RA2SHD_32x2048.v:748: Loop exceeded maximum iteration limit. (ELAB-900)

Does this means that synthesis cannot support the huge memory so I have to change may rtl code to split up the memory into smaller size.

 

[anjali]

elab-900

if the code follows the RTL guidelines then only it is synthesizable.

for loop is not synthesisable. then how DC can synthesize that code?

Added after 30 seconds:


if the code follows the RTL guidelines then only it is synthesizable.

for loop is not synthesisable. then how DC can synthesize that code?

 

[joe2moon]

dc_shell loop

1) Yes. Its' the capacity limit of Design Compiler.

If the size of memory array is too large, then DC may have problem.
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2) The way of Memory implementation depends on its size, because it impacts the core area a lot.

In this case, the RTL code of this memory should only act as a "simulation" model. It is only the "behavior" model.
There should have other models, such as .db, .lib, .lef, or .plib, which used for implementation. And you do not have to synthesize this one !