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DC Offsets in Direct Conversion receiver

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dd2001

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Staring receiver project using Direct Conversion (DCR), is there any good idea to handle DC offsets in DCR? I read several papers, however, not get very clear picture to deal with DC issue, any sample ciruits would be very helpful.

For the LNA, should it be sigle ended or double ended design, Biploar or CMOS?


Thanks
 

Most of the time, after DCR the signal is fed to an A/D converter. After this point it becomes an algorithm in signal processing to eliminate DC offsets.
 

There are two ways to reduce DC offset. One is to use AC couple to filter out the DC, the other is to use DSP algorithm to implement a DC compensation.
 

dd2001 said:
For the LNA, should it be sigle ended or double ended design, Biploar or CMOS?

It depends on on the working frequency, system spec.( NF, IIP3, power dissipation, etc.), differential BJT LNA is very popular.
 

Does AC couple realy work?

spweda said:
There are two ways to reduce DC offset. One is to use AC couple to filter out the DC, the other is to use DSP algorithm to implement a DC compensation.

Well, I was told AC couple to filter out the DC is not working anymore, particularlly for GSM, anyone can explan this why?
 

The best option is a DC compensation algorithm used in the DSP or FPGA. Depending on the application, for example WCDMA or bloetooth, the answer can be different but at least in my opinion if the A/D is not saturated the DC compensation algorithm is better.
 

There are a number of reasons that might not work quite well. DC offset adjustment takes some time depending on time constant.
GSM uses frequency hopping TDMA (Time division Multiple Access) and narrow channels.

Here is some info about it.

200 kHz channels
8 subscribers per channel
217 hops/sec

Attached is a proposal and implementation from Hitachi for GSM band receiver IC.
 

DC offset

Hi people,

This is a problem of AC coupling:
The baseband spectrum is low-pass, i.e. it has important components around zero frequency. AC coupling places a zero at frequency 0 that eliminates DC but also some of the spectral content of the signal, that ‘losses the baseline’, increasing the error probability. This loss can be mitigated placing the pole at very low frequency, that can work well in steady state, but is not suitable for burst mode because the time required for reaching steady state (i.e. to charge the capacitor) is inversely proportional to the frequency the pole.

This problem would be eliminated using a modulation scheme without spectral contents around the carrirer, e.g. using a baseband shaping like Manchester, but this would increase the bandwidth (e.g. roughly speaking Manchester needs a bandwidth twice that NRZ).
Cancelling DC is possible in burst mode after digitization if the ADC don´t saturate.

Regards

Z
 

Having direct conversion receiver with DC brings a lot of troubles :) If there is option, then avoid it. Highpass at 1khz is useful for most aplications...
 

DC offset calibration

Anyone can show argorithm of DC offset calibration Circuits?

Thanks.
 

The AC couple may suitable for the CDMA application since the spectrum of CDMA system is either 1.2 MHz(CDMA) or 3.84 MHz(WCDMA). A spectrum loss due to AC couple around the DC is less than 1%. However for the GSM system, the spectrum bandwindth is just 200 KHz, the spectrum loss due to AC couple may be larger than 8%.
 

Re: DC offset calibration

dd2001 said:
Anyone can show argorithm of DC offset calibration Circuits?

Thanks.

My understanding is that they send a KNOWN training sequence at first, where the direct receiver will receive and distort it due to DC offset errors, but then since it already knows the sequence, it can calculate the error in I and Q due to DC offset, and use those errors as calibration table to correct newly arriving signals.
 

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