ssram
Hello dear friends.
Please, help me understand some things about ssram(cypress).
Get, for example, CY7C1381C.
In datasheet we see that it is 512K X 36/1M X 18 Flow-Thru sram. What does it means? What amount of memory we have? I see only 19 pins of address bus. With 19 pins we can address only 512kbytes. A0 and A1 pin used for burst counter. If I do not use it, what I should assign?
Now I have get a devboard with this memory, connected to Cyclone FPGA.
I have wrote simple controller according to datasheet timings. And I have 1 problem: to write or to read from memory takes 4 cycles (two address phase and two data phase) even on very low frequency - 50Mhz. If I use only 1 clock cycle I get incorrect data. What may be the problem?