Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Current transformer

Pixelx

Member level 3
Member level 3
Joined
Aug 25, 2024
Messages
65
Helped
0
Reputation
0
Reaction score
4
Trophy points
8
Activity points
577
Hello
Example:
when designing a transformer with a turns ratio of 10, it is better to design 1 primary and 10 secondary turns
or better, 10 turns of the primary and 100 of the secondary. In both cases I have 10. The magnetic coupling will be better in the second case. And core saturation probably doesn't play a role here because the transformer works on a short circuit.
 
It depends....With current sense transformers you often just have 1 pri and often 100 sec coils.....nobody bothers too much about coupling in that case...you see them wound on split bobbins with the 1 pri in one section, and the 100 turns in the adjacent section half.....so not much attention payed to make it good coupling, but still works fine......last time i saw this was the CST in a 300V to 100V dual cascaded buck of 300W.
 
In which case the measurement error will be smaller as we have turns ratio of 10 in both cases:

1:10 or 10:100 and why and can it be calculated or do you have to wind it up, measure the absolute and relative error and then evaluate it?
 
Sorry but first i must ask what is the application?...as this is needed to answer relevantly.

You see with a CST you must look into the magnetising current error situation. If your Lsec is too low, then you can literally get the current in the burden resistor ramping down when in the circuit it actually ramps up.

For current mode control the absolute accuracy of the CST doesnt matter too much.
 
Hi
because the transformer works on a short circuit.
usually the sec side works on a burden .. to get a voltage that is proportional to the current.

But "usually" means the same as "guessing". To avoid guessing, we need to see your schematic ... to see how you "shorted" it.


Klaus
 
current sense transformer is bound by the same rules as all transformers:

dB/dt = V/ ( N. Ae ), this "V" includes the IR drop in the LV ( output ) wdg,

So say you want an 200:1 CT, and the pri is 20A, the sec is then 100mA, on a 10 ohm resistor this is 1V

so for a peak swing of 50mT say in the CT, for 1 V out, at 50kHz say ( 10uS each way, or 10uS on time with 10uS reset time )

0.05 / 10uS = 1V ( + IR drop @ 100mA ) / ( 200 . Ae ) - this gives the min area of the CT core that will work for these parameters.

you're welcome !
 
1:10 or 10:100

The primary needs enough turns (and/or enough metal in the core) in order to give it proper inductance. Current shouldn't rise too quickly or too slowly through the primary. The correct value should yield usable readings throughout your intended range of usage.

Tactic I read about:

1) Wind one turn on the core,
2) Measure Henry value of one turn,
3) Count while adding primary turns until test shows desired inductance,
4) Wind 10X amount of turns on the secondary.
 
I don't have any project, it was my evening thought, I was wondering what would be better - winding 10 turns on the primary side and 100 turns on the secondary side and having a turns ratio of 10 or 1 turn for primary and 10 for secondary.

We can consider two cases, one for measuring large currents, e.g. 100A and the second case for measuring low currents 500uA - 1mA - quartz resonators.

In my opinion, it is better for quartz to wind 10 turns for primary and obtain a better magnetic coupling.

For large currents, it is better to have 1 turn passing through the core.

On another issue
Let's assume that we have to design a 100A CT and we want the error to be as small as possible. It is better to wind the primary 10 turns and the secondary 100 turns or 1 turn and 10 secondary turns.

I'm leaving aside the issue of frequency, let's assume that it is high enough that the magnetization inductance does not have a significant impact on the measurement error because this inductance mainly affects the error and I only mean the number of turns where the turns ratio is the same in both cases and what effect does this have on the relative measurement error



so for a peak swing of 50mT say in the CT, for 1 V out, at 50kHz say ( 10uS each way, or 10uS on time with 10uS reset time )
Where did you get this value of 50mT? step by step how do you approach this with the BH characteristics of a specific core material?

Could you describe step by step how you approach this?
For example, do you find a core, do you have BH characteristics, and how do you approach it and what formulas do you use?
If only you could write it down nicely so that you don't have to guess what the author means, e.g
 

Attachments

  • X.JPG
    X.JPG
    34.9 KB · Views: 44
Sigh, simple algebra gives the formula you seek, 1 / Ae ( m^2 ) = 200T . 50mT / ( 10uS . Total V drop on 200T )

or Ae ( mm^2 ) = 1E6 x ON time x Total V drop sec / ( sec Turns . Bpk )

for AC in the CT, this would work for Bpk each way, or for unipolar - e.g. flyback, Bpk.
 
Current shouldn't rise too quickly or too slowly through the primary.
I have to disagree.

It does not work this way.
A current transformer with missing (or open) secondary has a rather big magnetizing inductance.
It would rather fast go into saturation, because the secondary can´t build up a counter current resulting in a counter magnetic field.

Usually a current tranformer is designed for a secondary burden resitor with a range from 0 Ohms to a specified maximum.
If you use a higher value burden (than specified) resistor the core goes into saturation and the measurement is useless, because the output is extremely distorted.
In ideal case (regarding core saturation) one should use zero ohms at the secondary side (burden). In this case the inductance is minimal because it is dominated by the stray inductance and coupling of the transformer. The effect of the magnetizing inductance is minimal then.

In short: a (current) transformer acts very differently regarding current rise time with open (or missing) secondary ompared to a properly connected secondary.

If one needs an inductance that can effectively reduce current rise rate .. one needs a much bigger sized inductor.

If you look at at a equivalent circuit diagram of a (current) transformer, then you see the big magnetizing inductance in parallel to the coupled output and the relatively low series stray inductance.
In a properly designed current transformer the stray inductance should dominate - because of the transformer coupling to the secondary.

Klaus
 
Could you describe step by step how you approach this?
If you are using ferrite at high frequency, then you dont want you delta B being more than 300mT.

So to work out that delta B you have to look at the secondary...and remember any rectifier diodes in there aswell......because they have Vf = 0.7V and that voltage is also across the secondary of the CST.


From first principles, we have Lenzs Law and Faradays Law

V = Ldi/dt
V = Nd(phi)dt

....equate right hand sides

Ldi/dt = N d(phi)/dt

So

Ldi = N.d(phi) (N = number of turns)

Now, phi = B.A (A is area)

So

L.di = N.B.A

So now you have your equation relating L, B and A.
___ ___ ___ -__ ----

So suppose you have 2V across the Lsec of the CT for 10us.
Then by V = Ldi/dt you can work out the "di". (ie the rise in magnetising current)

Then from that di you can work out what B it corresponds to because from above di = B.A.N/L

So dB (delta B) =( L.di)/(A.N)

And delta(B) should preferably be less than 300mT.
Though because CSTs are on such small , low volume cores, you can often get away with +250mT in one direction, and -250mT in the other direction. (ie AC flux like that).
___ -__ ___ -__ -__ -__
Yes and so say you have a CST with Lpri = 200nH and Lsec = 2mH........then when this is in circuit the 200nH wont be "seen".....in the power circuit being measured, you will rather see only the leakage inductance referred to the primary.
This is why you can get away with putting a CST in the source of a low side MOSFET of an SMPS.
 
Last edited:

LaTeX Commands Quick-Menu:

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top