Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

current steering logic(CSL) buffer

Status
Not open for further replies.
C

chang830

Full Member level 5
Full Member level 5
Joined
Feb 11, 2006
Messages
267
Helped
14
Reputation
28
Reaction score
3
Trophy points
1,298
Activity points
3,425
current steering logic csl wiki

Hi,
In the mixed mode design, to reduce the di/dt noise, CSL(current steering logic)attract more and more attention.

I am not familar with the CSL and I want to know is there any mature product of mixed mode IC used this technique instead of conventional static inverter?

Thanks
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top