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Current reference circuit

bharath_k

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Hello Everyone,

I am trying to design a current reference circuit. I want a current of about 20 pA current and the technology I am using is 180nm EM microelectronic.

Unfortunately I am running out of ideas. I have tried using a diode connect NFET with vgs=0 to use the leakage current and tried using it in a beta multiplier circuit. But again I see a lot of fluctuation in current for different corners.

If anyone has experience in designing current of this range in this technology kindly give me some suggestions. I have never designed a current reference and in sub treshold regions.

My knowledge is limited to beta reference circuit. Hence I am open to any kind of topologies and ideas.

Thanks,
Bharath
 

SunnySkyguy

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Hello Everyone,

I am trying to design a current reference circuit. I want a current of about 20 pA current and the technology I am using is 180nm EM microelectronic.

Unfortunately I am running out of ideas. I have tried using a diode connect NFET with vgs=0 to use the leakage current and tried using it in a beta multiplier circuit. But again I see a lot of fluctuation in current for different corners.

If anyone has experience in designing current of this range in this technology kindly give me some suggestions. I have never designed a current reference and in sub treshold regions.

My knowledge is limited to beta reference circuit. Hence I am open to any kind of topologies and ideas.

Thanks,
Bharath
Vin = ? Sink or source 20 pA?
 

dick_freebird

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Can you try designing for higher current and then mirror it to 20pA?
That would have been my suggestion. Might need to do multiple mirrors as the product current is so low relative to sane on-chip resistor values.

Is an off chip set-resistor allowable? A chip resistor would take out most "P,T" variation if you used a vref resource and a pass FET w/ simple op amp feedback.
 

SunnySkyguy

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I was curious how Keithley-261 designed their 2% 1 picoamp constant current source .
Then I found this in their maintenance manual.

1632330391756.png

--- Updated ---

:unsure:http://web.mit.edu/8.13/8.13d/manuals/keithly-261-picoampere-source.pdf
--- Updated ---

:confused:
 

bharath_k

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Sadly off chip resistor is not allowed. Instead I was trying to use gate leakage current of NFET and achieve the required high resistance. But for the technology I am using the gate leakage has too much changes across corners.
 

SunnySkyguy

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dick_freebird

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Given the constraints I think you want a CTAT
design (T) but one that can be trimmed to accuracy
(P), at whatever current density makes sense for
the technology; then a cascade of 1/N current
mirrors to knock the value down to range. Super
long channel or maybe annular / ringed source
to get field / edge leakage under control, which
can be an unmodeled influence at such low current
of interest.
 

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