Current Mode Half Bridge converter proof

[24vtingle]

Hi,
The attached proof that Current Mode Half Bridge can be used as long as the current ramp isnt too steep has assumed that the two rail splitter caps are of equal value and are with equal leakage current. This isnt necessarily the case as caps usually have +/-20% tolerance.

http://www.runonielsen.dk/Half_bridge_control.pdf

Does anyone have further proof? (the above is the only proof found publicly across the entire www)

Dr Ray Ridley has informed of the current mode issues of Half Bridge in his Book "Power supply design" page 8. Dr Ridley makes no mention that it can all be solved by just limiting the current slope ramp to a certain value. In Ridleys summary of Half Bridge, Ridley says..."current mode control problem..not recomended for most cases" and "For offline applications, the current mode issue, and other complications from which the half bridge suffers, make the Two switch forward the preferred approach"

Also, there is a lack of silicon controller IC offerings for offline half bridge which tends to suggest that the entire industry does not rate the Half Bridge with some current information in its ramp signal.

This was also talked about here...

Current mode Half Bridge converter.

Hi, We all knew that Half Bridge shouldnt be done in Current Mode. But with software to guide it, Current mode becomes possible. You simply repeatedly measure the voltage on each of the series stacked capacitors....(by using two potential dividers)...and then you slightly adjust the alternate...

www.edaboard.com

Technically speaking, the current mode half bridge would be superb for offline power conversion...since each FET only sees VIN/2 so switching losses are far less.
Also, it only has two fets, and due to the VIN/2 thing, the chances of dv/dt spurious turn on of the opposite fet are far less than eg a full bridge.

The gauranteed way of success for half bridge is current mode with a small equalising flyback stuck to each of the rail splitter caps. Each just dumps the energy back to the input.

 

[Easy peasy]

actually each fet sees Vin, not Vin/2, the transformer sees Vin/2, the currents are double for the same output power as a full bridge.

Using Vin ( scaled ) to feed the ramp signal, gives a performance similar to current mode - with just voltage mode

current mode has successfully been used on the half bridge with low levels of current information and slope comp - if any proof is needed LTspice is a powerful tool with which to do stability analysis

 

[24vtingle]

Thanks, LTspice i find gives balance on the splitter caps with far more current slope than Runo Nielson suggests.
LTspice is extremely "Kind" to the current mode half bridge, and its one of the cases where i suspect the simulator is a little "too ideal to be true".

actually each fet sees Vin, not Vin/2

Thanks, yes, when the bottom FET is ON, the Top FET sees Vin. Though the signficant thing is that the switching loss aspect is of vin/2...for example, when a fet switches on in a half bridge, its vds goes from vin/2 to zero, whilst its current rises. Or rather, when switching on, during the miller plateau, the vds of the fet goes from vin/2 to zero.

 

[Easy peasy]

LTspice is no kinder to the 1/2 bridge than any other power stage

Actually - depending on layout, Tx leakage, switch current and speed of turn off - the 1/2 bridge Vds easily flies up to full rail at turn off - with all attendant sw losses, before settling - in a ringing fashion - to 1/2 HVDC. ( LTspice shows this too )

As for turn on - as the current is double than for a full bridge - the turn on losses are similar to the full bridge too.

Only theee most perfect power circuit will have limited overshoot ( of half rail ) at turn off.

This is why resonant converters are becoming the prevalent " go to " design option, lower Psw and lower RFI . . .

 

[24vtingle]

Thanks

resonant converters are becoming the prevalent " go to " design option, lower Psw and lower RFI . . .

Though unfortunately they do have their failure modes, if the PSFB can be classed as a "resonant" converter.....as said in #14 of this...

PSFB abnormal heating and current oscillations

Hello everyone, I am designing a PSFB converter with a current doubler topology in the rectification stage, using the UCC28951PWR controller. The rest of the circuit follows the topology provided in the datasheet: the drivers and the controller are referenced to the secondary ground, and the...

www.edaboard.com

..in this thread, you yourself state how many manufacturers have "lots" of failures due to this. "lots of field failures" as you say yourself.

Probably many know that you are one of the forement SMPS engineers in the Western world at least, and you are saying there are "lots of field failures" of PSFB due to the failure mode. (but well done for opening up on this, which is one of the bigger "dirty secrets" of the SMPS world)

...the LLC also has a similar kind of failure mode, which is well documented.

There are of course applications where the failure mode is not so well acquainted, but the LLC and the PSFB, have singularly failed to dominate the world as we were all told that they would. They are not particularly difficult to design, though designing them to always avoid the failure mode is difficult as no one can quite define it fully. There are many engineers designing LLCs and PSFBs for their company, without a care in the world for the failure mode.....they simply want the LLC or PSFB design on their CV....they will have left the particular company by the time the field failures start coming back.

Here Infineon offer a solution to the failure mode in the LLC....its quite startling that infineon imply that this kind of expense and effort is needed to avoid the LLC failure mode....

Page 56, 57 of the below shows some of the perils of the LLC:

https://www.infineon.com/dgdl/Infin...N.pdf?fileId=5546d46253f6505701544cc1d15c20d7

...This shows that a specific processor programmed for LLC is needed, and pages 56 and 57 show the features implemented using the processor, and that these protections are not available with a plain LLC controller such as the ICE2HS01G......so thats the levels that you have to go to in order to avoid the failure mode........and if you ask an engineer to do that for you....how do you know they have really done it properly?..the field failures may take 12 months to start coming back on you.

LLC and PSFB win out in applications where there is a high power and voltage and a strict size restriction and you just cant make that with a hard switched converter, and you are prepared to accept a certain amount of failures anyway since you will just swap the power supply out.
(on a similar note, I used to work at a 8-15kW electric BLDC drive company and we sold customers "contracts to keep supplied with drives"...and during that contract time, we would keep them supplied with drives, and any that failed we would simply replace. Interestingly, when you asked, it was always said that we had a "zero failure rate"...which obviously wasnt the case...the repairs dept were constantly busy with failure returns)

In Dr Ray Ridley's book "power supply design", he has a section named "The 9 most useful power topologies"......here he lists buck, boost..etc....half bridge, 2TF, FB...."....but no mention of PSFB or LLC or any other resonant converter....this book was written in 2012. He recomends the full bridge up to 5000W.....nowehere does he mention LLC or PSFB in this chapter named "The 9 most useful power topologies".
So yes, the LLC and the PSFB have a lot of explaining to do, so to speak.
Of course, private companies understandably always keep details of their failure returns top secret...so we wouldnt hear anyway.

___
There was one customer that wanted a 320W peak burst mode offline SMPS....The load was operating in no-load-to-full-load bursts, and yet they wanted vout to stay within 36+/-1.0V....so the only way you could do it was in burst mode, with a regulating burst mode comparator in the SMPS control......LLC and PSFB were avoided for this service as the chance of "the failure mode" raising its ugly head was just too high.
The PSU could have been on no load for a minute(s), say, then suddenly go into bursting on and off for 100ms or so....with each burst being like 20ms ON, 20ms OFF...etc etc...or even 80ms ON, 80ms OFF...etc etc

Also recently, a well known multinational were declaring 93% efficiency for an offline 100W LED driver
which comprised a Boost PFC and an LLC.
So that means the Boost PFC must have been 90%+ efficient and the Boost is a hard-switched converter.
And even the BCM Booster has low turn ON losses but high turn off losses.

And in any case, the Plain Full/Half Bridge has some leakage inductance....which means that even in a CCM
Full/Half Bridge the switching loss isn't as high as the ideal calc would suggest....since when a CCM Full/Half Bridge FET turns ON,
the current in the FET has to build up by way of di/dt = Vin/L(leak)....so in other words, the current is still well low at turn ON whilst the VDS voltage is falling.

At a guitar amp place we once had 2 Apps Experts from a very very well known semico' come and try and flog us their LLC controllers for our class D guitar amplifier offline supply...the power peak was only 350W.....most of the time these things are in pretty well no load.......ideal circumstances for illiciting the failure mode of the LLC....but on and on they kept trying to flog their LLC wares. The average power of these things is usually less than peak/8 anyway...so LLC not really needed at all.

The UK motorway network is still mostly not streetlight lit...(just look how much of even the M25 still isnt lit!) because the UK government has been experimenting with "Long life" LED drivers comprising Boost PFC -> LLC......so many have failed over the years that the UK gov has not decided to light the entire network with these LLC based LED drivers...if a motorway streetlight fails....someone has to get up a pole in the middle of the motorway in order to replace it, and essentially put their life at risk....This application should have been made for the LLC.....but its not....LLC failure modes!

We've all seen these mega high floodlights for building/work sites...

https://www.dreamstime.com/tall-floodlight-pole-eight-lights-top-stretches-up-blue-sky-cumulus-cirus-clouds-metal-reaching-cloudy-image359536599

...as you can imagine , you don't want those lamps failing often...at one company, the customer was so fed up with failures
of the "oh so efficient" LLC based LED lights for this super-high application, that they decided to instead go for a design involving sequence switched linear regulators! The only SMPS in them was the wee 0.5W Buck bias supply!

This article

https://www.infineon.com/dgdl/s30p5.pdf?fileId=5546d462533600a401535748559c3fcd

...implores of the failure modes of the LLC, and says that special FETs are needed for it. in
order that failure modes can be avoided.
The article also tells of LLC failure modes at high frequency..."The problem will
get worse when the (LLC) converter works at high
frequency in which less time is available for the body
diode to remove and recombine the charges."
..And yes, this corresponds to what was seen with a 3kW offline LLC EV charger from a highly reputable European manufacturer...
They were only ever switching the LLC at two discrete frequencies....one was the upper resonant frequency
(100kHz) as expected.....and the other was 200kHz where the dead time was literally the same as the overall ON time
of the FETs(!!)...this (200khz) was used when in light load.
The output voltage of the LLC was changed by changing the output voltage of the Boost PFC that preceeded the LLC!
So there you go...that LLC could not be trusted in variable frequency mode to handle changing loads.....they had to
change the vout of the preceeding Boost PFC! This suggests how the LLC needs a lot of "nannying" to try and stop it failing.
-That Charger was controlled by a microprocessor which controlled the LLC and Booster.
OK so we can get the "special FETS"...but how "special" should they really be?...and will they always be in stock?
And why do Infineon recomend their processor driven solution (as depicted above) to the failure modes if the "special FETs" mitigate the LLC
failure modes.?

So we now see, another "topology" opening up in SMPS..
But its never spoken of.
Its for example a Full Bridge with a rather high leakage inductance in the transformer.
There are no losses associated with it in the primary side as it (current associated with leakage L energy) just flows through the fet diodes and back to the
vin capacitor.
It undoubtedly helps to reduce turn ON switching losses.
Its even seen in the last offline 130W 2TF that I did...was more efficient when the transformer was NOT interleave wound.
So the "evil" hard switched SMPS isn't necessarily so evil at all.
Such a "half way house" converter does not suffer the same failure modes as the LLC and the PSFB.
But will take revenue from the LLC and PSFB chip vendors so maybe is not so loudly spoken of.

Also, I used to work at a place that made custom 1kW, high_kV PSUs. (about 15kV or so).
They had to use LLC because the isolation in the transformer meant you ended up
with high leakage inductance and so LLC was thrusted on you, rather than
it being a choice.
They used to blow up in the field...that was expected. Their top engineer told me that
it was "not if, but when" they blew up in the field.
He told me that in the transformer gate drive for the high side FETs they used to put maybe 100R or so from gate to source
so as to try and stop some of the blow ups.
They also had to go PFC -> Variable Vout Buck Converter -> LLC (!!!)
That's how they would regulate the output. The bucks output was regulated
so as to make the LLC output what it should be...no way would they let
the LLC get to work on its own control , because, you've guessed it....bang!
LLC failure modes!.

Resonant converters barely get a mention in Dr Ray Ridley's book "Power Supply Design" (2012). I wonder why?
They get all of three lines on page 14, just saying they have a "niche". Nothing more said.

Once we had a top Power Supply consultancy come and visit us, and their top guy told us that up to a few hundred Watts and with UK mains input...a couple or more of paralleled interleaved flybacks takes some beating! No high side drives, No current sense transformers, simple transformer, one pri fet, one sec diode in each stage. No output inductor needed. No resonant capacitor needed. Simple current mode control chip...it goes on.

Is anyone surprised that LLC and PSFB just havent got anywhere near swiping all other "harder-switched" converters out of the way yet?

 

[Easy peasy]

To be fair, one CAN design, LLC and phase shift full bridge ( with all its variants ) to operate for many years with no concern of built in failure modes.

You just need to choose the right fets - for years these were IXYS, proven ( by us ) to be far more tolerant to low load recovery issues than just about any other mosfet - and we blew up quite a few of other makers fets trying them out.

IXYS never made a huge song and dance about this - but they really should have - as their fets were ( and possibly still are ) far superior in this respect, known for quality too.

...for mass production - just use a valley switched ( DCM/CrCM ) flyback, easy up to 200W or so, two of them up to 400W, no LLC type issues, one magnetic - plus some filtering parts - easy peasy - ( also low RFI )

for 500W to 1-3kW the parallel loaded SRC wins hands down - plenty of reverse current in the mosfets, so you can use nearly any makers, you need an O/P choke and some small snubbering on the o/p diodes ( or mosfets ) but the dv/dt on the pri side can be made >100nS, the transformer sees low rms currents and LLC chips can be used for control, if you want you can have 400kHz ( no load ) to 200kHz full load - and a kindergarten student can design it ! ( also pretty low RFI )

horses for courses . . .

 

[mtwieg]

Hi,
The attached proof that Current Mode Half Bridge can be used as long as the current ramp isnt too steep has assumed that the two rail splitter caps are of equal value and are with equal leakage current. This isnt necessarily the case as caps usually have +/-20% tolerance.

http://www.runonielsen.dk/Half_bridge_control.pdf

It's an interesting paper, I don't think I've seen a similar analysis before.

Only flaw I could maybe spot is that for the analysis around figure 8, it says "We will assume that Lm is large and the ripple in Im is small". But looking at figure 8 closely, it seems that Im has no ripple at all, but is a constant. This cannot be true, as the ripple in Im approaches zero, the magnitude of Im will also approach zero. Not sure if this significantly affects the conclusions though.

Also it's strange that it doesn't mention staircase saturation at all, another practical issue closely related to voltage balancing.

 

[Easy peasy]

@mtwieg - if you have the following two things:
1) a measure of the current signal in the ramp ( or negatively in the EA output )
2) near balanced capacitors ( assuming a soft center point )

then the I mag will be in balance - mainly from 1) - where the delta Imag is quite small compared to the peak current - you will always have issues and this is where external slope comp shines.

for a hard center point on an half bridge power circuit - e.g. the 2 diode, 2 cap solution for getting ~ 250VDC from 110V mains - for this hard center point - the cap voltages do not collapse ( or increase ), and some current signal in the ramp is a good idea for limiting Imag

for very high Imag ( like when some gap the core ) this artificially introduces slope comp ( if the CT is on the pri side ) - which is why some engineers of limited knowledge rave about the properties of adding a gap - it has solved the real underlying problem they knew little to nothing about.

 

[24vtingle]

To be fair, one CAN design, LLC and phase shift full bridge ( with all its variants ) to operate for many years with no concern of built in failure modes.

You just need to choose the right fets

Thanks, though then we would ask, why is it that Infineon, at a time when they also made these "more resilient" FETs exactly as you describe, why do they put forward the expensive processor driven method to mitigate LLC failures as depicted in post #5 above? (repeated below...)

___ ______________________________________________
..Page 56, 57 of the below shows some of the perils of the LLC:

https://www.infineon.com/dgdl/Infin...N.pdf?fileId=5546d46253f6505701544cc1d15c20d7

...This shows that a specific processor programmed for LLC is needed, and pages 56 and 57 show the features implemented using the processor, and that these protections are not available with a plain LLC controller such as the ICE2HS01G......so thats the levels that you have to go to in order to avoid the failure mode of the LLC....
___ ______________________________________________

...surely if the "special FETs" that you speak of can mitigate the problem, then why do Infineon say that their (expensive ) processor driven solution is needed?

Not only expensive...but an expensive software engineer has to be found to write and modify this software for all the different LLC's which will all be different and need tweaks to the code..........big wages for some software engineer to maintain all of this........this wouldnt be tolerated if just using special FETs got rid of the problem.

 

[Easy peasy]

not particularly special - just plain good - IXYS always had great parts ! even if the Cg-d was a little higher than most ( perhaps this helped ! )

 

[24vtingle]

not particularly special - just plain good

Thanks good or not, the processor solution to LLC blow ups is more expensive than just using say IXYS FETs...so its a mystery why Infineon propose it.
But maybe the special FETs arent so special, or they still give an LLC that needs "nannying" as i describe above?
Or maybe the special FETs get it working, and with these very high power PSUs, people are willing to tolerate a certain percentage of failures, rather than having a long life high power PSU that weighs twice as much?

 

[Easy peasy]

In the days when IXYS was selling a lot of fets, they were well known for being the " go to " fet for resonant designs, mainly because any slight lapse of ZVS did not kill them - they had high dv/dt ruggedness - these days if you are using " joe Bloggs " fets - you really need to test on the bench with a power circuit you can adjust for loss of ZVS and then observe temp rise, RFI and other conditions to see how they go - and then pray they don't change the brew in the fab house ( this problem has happened to many - most notably die shrinks - but also other slight changes to manufacturing process ).