Current mirror in 2 stage op-amp

[Chinmaye]

I have designed a 2 stage op-amp to be used in a switched capacitor circuit. The first stage of the op-amp is diff input and diff output op-amp with NMOS input pair. The NMOS current source carries a current of 640uA. I am mirroring it from 10uA current source. So, the ratio of (W/l) = 1:64. With this arrangement the gain and PM of the op-amp are satisfactory. But, when I use this in an SC circuit I get a distorted output.
I tried to use 2 mirrors with ratios 1:32 and 1:2. This arrangement works fine in the SC circuit. I don't understand the reason. Any leads?

 

[martinnl]

You don't give enough information for an actual answer but I can try and guess!

With a 1:64 ratio you probably end up with either a large Veff or a large transistor. A large Veff results in distortions earlier.

But without knowing sizes, type of distortion, operating points, some Screenshots, etc. It is impossible to know.

 

[Chinmaye]

You don't give enough information for an actual answer but I can try and guess!

With a 1:64 ratio you probably end up with either a large Veff or a large transistor. A large Veff results in distortions earlier.

But without knowing sizes, type of distortion, operating points, some Screenshots, etc. It is impossible to know.

I am attaching the circuit here. I get the required current from both these circuits. The gain and phase margin of the amplifier using these circuits are the same. But when I use this op-amp in the SC sample and hold amplifier the output is distorted. The circuit with one mirror does not work but 3 mirrors work.

 

[martinnl]

The two mirrors does not have the same ratio 61 for the first one and 60 for the second one. Also the parasitic capacitance is different between the two.

Also the operating point might be different. What kind of distortion do you see? Run a DC sweep where you sweep the input voltage and a transient with a square wave in. For the current mirrors you can run a DC simulation and sweep the output voltage to see how, and why, they differ.

 

[Cascoded]

Hi Chinmaye,

Let me know if I am wrong, but I think you are not taking into account the bandwidth of the bias network. When you are biasing the amplifier using a 1:64 ratio (quite a strange ratio, I wouldn't use a ratio higher than 1:16), you have gm_out / gm_in = 64.

The bandwidth of the bias network is limited by the pole at the node where you generate the bias voltage (drain of the diode connected transistor). In this way, the GBW of that circuit will be ~gm_in/C_L, so when you reduce the ratio to 1:2 (assuming the capacitance does not increase too much), you are increasing the bandwidth 32 times! That means that the bias voltage will be recovered from any coupled noise faster.

However, this is just an assumption, we should need some waveforms and you should explain the problem thoroughly so we can understand it properly. Please check how stable is the current source in the opamp using both biasing networks and provide some feedback.


Regards.