current limiting system on a power supply line

[glias]

Hello all,
I would want to put a limiting current system on my powersupply, but LTspice gives me results that I can't explain... could you please help me to know what is wrong in my circuit and/or in my simulation ?

Thanks a lot

Version 4
SHEET 1 1524 680
WIRE -176 -496 -336 -496
WIRE -16 -496 -96 -496
WIRE 128 -496 -16 -496
WIRE 224 -496 128 -496
WIRE 640 -496 320 -496
WIRE 128 -448 128 -496
WIRE 240 -432 240 -448
WIRE -16 -384 -16 -496
WIRE -336 -320 -336 -496
WIRE -64 -320 -336 -320
WIRE 128 -320 128 -368
WIRE 128 -320 32 -320
WIRE 240 -320 240 -352
WIRE 240 -320 128 -320
WIRE 640 -288 640 -496
WIRE -336 -240 -336 -320
WIRE 240 -224 240 -320
WIRE -336 48 -336 -160
WIRE 240 48 240 -144
WIRE 640 48 640 -208
FLAG -336 48 0
FLAG 640 48 0
FLAG 240 48 0
SYMBOL pmos 320 -448 M270
SYMATTR InstName M1
SYMATTR Value Si4825DY
SYMBOL voltage -336 -256 R0
SYMATTR InstName V1
SYMATTR Value 15V
SYMBOL res -80 -512 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName RShunt
SYMATTR Value 0.5
SYMBOL res 224 -240 R0
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL pnp 32 -384 R90
SYMATTR InstName Q1
SYMATTR Value 2N2905A
SYMBOL load2 640 -288 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 2
SYMBOL res 112 -464 R0
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 224 -448 R0
SYMATTR InstName R3
SYMATTR Value 50
TEXT -370 72 Left 0 !.tran 40ms uic

 

[glias]

nobody ... ?