crystal oscillator simulation

[slchen]

I am doing ac simulation for my crystal osc.
I would like to confirm the frequency response of my design.
Please give me some comments.
As the attached figure, which points (A, B, C and D?)is better to be broken in the loop?

Many thanks.

 

[LvW]

Here is my recommendation for breaking the loop with the aim to perform an ac analysis:

Point A or point C

Reasoning: by breaking the loop the load conditions at the breaking point shouldn´t change. So it depends on the input resistance of the inverter (as high as possible) resp. its output resistance (as low as possible).

Hint 1: Insert the ac source between both terminals IN, OUT of the breaking point and the loop gain is V(OUT)/V(IN).

Hint 2: If the mentioned load conditions are critical you have to follow a special procedure which is a bit more complicated (I could give you some refs); however, in your case, the above described method should suffice.

 

[holddreams]

Would you please share your "special procedure for load condition"?
Thanks.

Here is my recommendation for breaking the loop with the aim to perform an ac analysis:

Point A or point C

Reasoning: by breaking the loop the load conditions at the breaking point shouldn´t change. So it depends on the input resistance of the inverter (as high as possible) resp. its output resistance (as low as possible).

Hint 1: Insert the ac source between both terminals IN, OUT of the breaking point and the loop gain is V(OUT)/V(IN).

Hint 2: If the mentioned load conditions are critical you have to follow a special procedure which is a bit more complicated (I could give you some refs); however, in your case, the above described method should suffice.

 

[FvM]

I think, in AC analysis, inserting a series voltage source as suggested always keeps the circuit impedances. Alternatively, a parallel current source may be used to break a current loop, evaluating the ratio of currents at both sides.

 

[slchen]

Here is my recommendation for breaking the loop with the aim to perform an ac analysis:

Point A or point C

Reasoning: by breaking the loop the load conditions at the breaking point shouldn´t change. So it depends on the input resistance of the inverter (as high as possible) resp. its output resistance (as low as possible).

Hint 1: Insert the ac source between both terminals IN, OUT of the breaking point and the loop gain is V(OUT)/V(IN).

Hint 2: If the mentioned load conditions are critical you have to follow a special procedure which is a bit more complicated (I could give you some refs); however, in your case, the above described method should suffice.

Your comments are very useful for me.
I have suceeded in simulating the ac response of my crystal osc design by HSPICE.
Many thanks.

 

[LvW]

Hi holddreams,

here are some information and a document which deal with the problem of simulating open loop response.

1.) General remark: In order to measure/simulate the open loop response the definition requires to open the loop. However, breaking a feedback loop is very often problematic because (a) the bias of the circuit may disappear and/or (b) the circuit properties are altered if the load at the breakpoint disappears.
Therefore, a point has to be selected with a rather low source resistance and/or a very high load resistance (opamp output or input).
If - for some specific reason - such a point cannot be found, there is a way to simulate the open loop response under closed loop conditions.
A coresponding method is described by Middlebrook

2.) There is an application note from MICROSIM (the former PSpice company) which is based on the Middlebrook method and which describes the procedure in detail (Simulating High-Q Circuits using open loop response).
This method calculates open loop gain for real circuits without systematic errors.
A document with all MIROSIM AN´s is given in the attachement.
Regards
LvW

 

[LvW]

Here is another good document which describes the problems and aleternatives for loop gain simulation.
LvW

 

[Sadegh.j]

Hi

I would say A

 

[butterfish]

I usually cut A.