cross-over cancellation method

[fady232]

Hello all, i was simulating this push-pull stage, where the cross-over gets cancelled.
But i didnt understand how it works, like who's forward biasing here the diodes? the power supply of 9V and -9V? ( like the circuit i show near to it )
or the signal vin is responsible for the forward biasing? and if its the power supply then why the vin doesnt matter? like ur not applying 2 signals?

 

[G4BCH]

V2 is the wrong way round. The PNP collector should be connected to -9V.
Assuming perfect components with no input Vout is 0V the base on Q1 is +.7V and the base of Q2 -.7V.
There should be a resistor from each emitter to R1 at the Vout junction to prevent the transistors from self destruction; there is nothing to determine the collector current.

 

[fady232]

V2 is the wrong way round. The PNP collector should be connected to -9V.
Assuming perfect components with no input Vout is 0V the base on Q1 is +.7V and the base of Q2 -.7V.
There should be a resistor from each emitter to R1 at the Vout junction to prevent the transistors from self destruction; there is nothing to determine the collector current.

yeah i mean this part i know i could add, but im trying to understand how this configuration works in general, who is forward biasing the two diodes?
the d.c voltage or the ac sinusoidal wave?

 

[KlausST]

Hi,

you have a simulation tool, so use it.

Just play around by removing VIN, V1, V2 .. and see what happens. Or change resistor values.
That´s how learning by doing works.

Klaus

 

[betwixt]

R2 and R3. Current flows through the resistors and diodes, dropping approximately the same voltage as Vbe across them. The voltage at the center point 'Vin' should be controlled by feedback so it is at near half total supply voltage, the same as at Vout.

The idea is that the diode voltage drop provides enough base to emitter voltage that the transistors are held at the point of conduction so none of the input voltage is needed to overcome it. As G4BCH pointed out, it isn't a safe configuration unless emitter resistors are also added and ideally some DC feedback from the output is used to centralize the bias point.

Brian.

 

[fady232]

R2 and R3. Current flows through the resistors and diodes, dropping approximately the same voltage as Vbe across them. The voltage at the center point 'Vin' should be controlled by feedback so it is at near half total supply voltage, the same as at Vout.

The idea is that the diode voltage drop provides enough base to emitter voltage that the transistors are held at the point of conduction so none of the input voltage is needed to overcome it. As G4BCH pointed out, it isn't a safe configuration unless emitter resistors are also added and ideally some DC feedback from the output is used to centralize the bias point.

Brian.

so by having on them a fixed drop of 0.7v they are always making the transistor to be in conduction? no matter what is the vin?

--- Updated Apr 24, 2025 ---

Hi,

you have a simulation tool, so use it.

Just play around by removing VIN, V1, V2 .. and see what happens. Or change resistor values.
That´s how learning by doing works.

Klaus

ye i do like this tbh, but i gotta also understand whats happening and why

 

[betwixt]

so by having on them a fixed drop of 0.7v they are always making the transistor to be in conduction? no matter what is the vin?

Correct.
Without the transistors being given the bias, the input voltage would have to rise and fall by 0.7V before they became conductive, that means there is a dead band around the middle (=0V) of the input voltage. That is why it is called 'crossover' distortion, it occurs where one transistor has stopped conducting but the other one hasn't started. Using two diodes isn't ideal, there are better methods but it is cheap and works reasonably well.

Brian.

 

[fady232]

Correct.
Without the transistors being given the bias, the input voltage would have to rise and fall by 0.7V before they became conductive, that means there is a dead band around the middle (=0V) of the input voltage. That is why it is called 'crossover' distortion, it occurs where one transistor has stopped conducting but the other one hasn't started. Using two diodes isn't ideal, there are better methods but it is cheap and works reasonably well.

Brian.

can u tell me an example of a better way to reduce this distortion?

 

[KlausST]

can u tell me an example of a better way to reduce this distortion?

From worst to best:
class B --> class AB --> class A --> feedacked

Klaus

 

[danadakk]

https://www.courses.ece.vt.edu/ece3274/poweramp.pdf

https://www.ti.com/content/dam/videos/external-videos/en-us/1/3816841626001/4650731413001.mp4/subassets/output-stage-presentation.pdf

https://link.springer.com/article/10.1007/s10470-006-5371-6

Sometimes you can get authors to send you their papers directly..

The above might help.

 

[fady232]

https://www.courses.ece.vt.edu/ece3274/poweramp.pdf

https://www.ti.com/content/dam/videos/external-videos/en-us/1/3816841626001/4650731413001.mp4/subassets/output-stage-presentation.pdf

https://link.springer.com/article/10.1007/s10470-006-5371-6

Sometimes you can get authors to send you their papers directly..

The above might help.

thanks.

--- Updated Apr 24, 2025 ---

https://www.courses.ece.vt.edu/ece3274/poweramp.pdf

https://www.ti.com/content/dam/videos/external-videos/en-us/1/3816841626001/4650731413001.mp4/subassets/output-stage-presentation.pdf

https://link.springer.com/article/10.1007/s10470-006-5371-6

Sometimes you can get authors to send you their papers directly..

The above might help.

for now im not designing things yet, its more to understand theory behind it

 

[danadakk]

The papers generally have theory foundations in them.

One more - https://ajaybolar.weebly.com/uploads/1/0/1/0/10106930/unit_6_power_amplifiers.pdf

 

[fady232]

The papers generally have theory foundations in them.

One more - https://ajaybolar.weebly.com/uploads/1/0/1/0/10106930/unit_6_power_amplifiers.pdf

The papers generally have theory foundations in them.

One more - https://ajaybolar.weebly.com/uploads/1/0/1/0/10106930/unit_6_power_amplifiers.pdf

thanks i will read this after i finish with these 2 u sent me

 

[dick_freebird]

There really ought to be a resistor from the final emitters (output) to the diodes' center to make the "mirror" behavior stay tight to each final device

Better too, to use replica devices for those "diodes" (CB-E) to best match "make" and co-mount to same heat slab as their mate, to minimize temp skew, both affecting Vbe match and crossover "handoff".

 

[D.A.(Tony)Stewart]

>who's forward biasing here?

Both supplies and the input signal bias the diode current, which adds to the distortion even if compressed by the quadratic diode law.
Both the supply voltage and signal voltage modulate the diode current with load from the supply resistor and the transistor load which looks like hFE * emitter load. You have a current gain amplifier, and by controlling the minimum current in both the diodes and transistors, you have both conducting for a small signal variation and then there is a current threshold with larger signals where one cuts out and the load is driven by the one polarity that amplifies the base current entirely to the load. Raising that minimum current means self-heating with no AC but also means less Vbe variation from the driving signal and thus less distortion and also a lower Vpp max. signal. So there are some optimal parameters to consider, all which demand high current gain and matching.

end edit:

Dick was correct to point out two important assumptions. Allow me to re-word and expand it.

In a push-pull NPN-PNP amplifier stage, add a small emitter resistor (Re) to each transistor, typically equal to or less than the transistor's saturation bulk resistance (Rce(sat) = Vce(sat)/Io, per datasheet). This mitigates thermal runaway by linearizing the quadratic Vbe vs. Ic relationship. As temperature rises, Vbe decreases (~-4 mV/°C NTC), increasing Ic and creating positive feedback (more current, more heat, lower Vbe). Re reduces this effect, balancing efficiency and stability.
Key Design Considerations:

1. Diode Bulk Resistance (Rs): Match diode Rs to transistor Rce(sat). Rs can be ~hFE × Rce(sat) to align PN junction voltages and prevent runaway.
2. Rce(sat) Matching: Select NPN and PNP transistors with closely matched Rce(sat) (within datasheet min/max ranges) for balanced operation.
3. hFE Matching: Choose transistors with high, relatively matched hFE (despite typical 3:1 max:min tolerance) to ensure symmetry.
4. Thermal Management: Mount diodes and transistors on the same heatsink to minimize temperature gradients.
5. Bias Design: Set diode bias current higher than the load base current to reduce Ib modulation, minimizing Vbe-induced quadratic distortion. Use multiple stages (2–3) based on impedance ratio and desired load regulation (damping factor).

These choices optimize stability, efficiency, and linearity while preventing thermal runaway.



Pour s'amuser, I made an interactive simulation where you can replace wires with current source biasing or change R values for example.
https://tinyurl.com/2b224pf4 Using a current source raises impedance to reduce losses and Vbe variation.

Note that the diode voltages do not match the transistor Vbe voltage very well, and there is no thermal effect in this simulation but you can change the diodes to 2N4148 which are low current diodes and see the effects of a higher bulk resistance and voltage drop on the output Iq. Pull the generator away to see Iq.

I have the NPN Vbe, Ibe on the left and the upper diode currents on the right plots below.

You will find these AB structures common to BJT Op Amps and HiFi stereo amps that use Class AB output stages. As Klaus said above, using NFB or negative feedback is the common and a good way to reduce the quadratic distortion effects while reducing the gain to the R ratios in the feedback circuit.