Creating a tech.dpux and how to load a LEF file

[princemufi]

Tech.dpux and LEF File

Hi,
I am currently trying to create a tech.dpux for vtvtlib25 standard cell library. I have managed to create a GDS file from the stream.map file provided by vtvtlib. I have used the tutorials provided on the net for the tech.dpux file but they all require lef2hdl could anyone suggest how to create the tech.dpux file in cadence which has information for the cell layout. The files i have currently are techfile.cds, template.v (verilog file for all cell), vtvtlib25.alf, vtvtlib25.tlf and vt_lib.lef.

Also if anyone has a tech.dpux file as someties is supplied. Could you kindly forward it to me or attach to the post. My e-mail is prince_mufi at hotm**l dot com. Thanks Help much appreciated

Regards
Mufi

Added after 2 minutes:

sorry forgot to say one more thing. The lef2hld file i mentioned is a tool do anyone know how to load it? as this would also help. I have tried tying it in CIW but says cant be found!!.

Thanks

 

[vbhupendra]

Re: Tech.dpux and LEF File

you can use abstract generator in CIW to create tech.dpux file. It can be dumped by loading any lef file (provided by foundary) in the abstract generator technology manager.