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CPLD for project

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shaklack

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hello,
I am looking for a vary fast CPLD for my project, i need to output one shot nanoseconds pulse with the fastest rise and fall down speed.
I will be vary appreciated if some one could suggest me the best one.
 

Hi,

The only one really useful informations here is "nanoseconds pulse".
Everything else are just vague words.

Nobody can know
* what CPLD complexity
* signal levels
* clock frequency
* input signals
* why CPLD at all, why no standard logic, why no dedicated IC, why no ASIC or FPGA
* rise and fall time from which to which level
* what's the application at all

Klaus
 

I don't think there are any CPLDs that can output a 1ns pulse. To do so you either have to use a 2GHz clock source or a 1GHz clocks source with DDR output registers. I don't think I've ever seen one that can handle clock frequencies that high.
 

There are asic/fpga families that can do this, but interface will most likely
be LVDS to get the rates and Tr, Tf times.

You did not specify loading or interface standard you want to meet the Tr and Tf specs.


Regards, Dana.
 

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