mrinalmani
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Hello! I am new to CPLDs...
I am working on a project and in the middle it has been decided to include a more advanced LED panel than what was planned initially.
This would require additional 40 to 45 IO pins than already available on the MCU. There is also a need for decoding the MCU output signal, eg binary to seven-segment.
I thought of using decoders for decoding and IO expansion. However, it appears that the MAX V CPLDs are actually cheaper than multiple decoders and also occupy less space.
I do not have much of experience with VHDL and other HDL languages.And at this point I cannot even afford to spend more than say, two weeks to learn a new software or language.
I have a few questions before beginning to design with a CPLD
Is a CPLD with 40 Logic Elements capable of doing the following....
1. accept a serial input
2. expand it to 48 bit parallel
3. Decode it and provide a 48 bit output
(Decoding will mostly be binary to seven segment)
Each logic element has a 4 bit LUT
Please help... thanks!
I am working on a project and in the middle it has been decided to include a more advanced LED panel than what was planned initially.
This would require additional 40 to 45 IO pins than already available on the MCU. There is also a need for decoding the MCU output signal, eg binary to seven-segment.
I thought of using decoders for decoding and IO expansion. However, it appears that the MAX V CPLDs are actually cheaper than multiple decoders and also occupy less space.
I do not have much of experience with VHDL and other HDL languages.And at this point I cannot even afford to spend more than say, two weeks to learn a new software or language.
I have a few questions before beginning to design with a CPLD
Is a CPLD with 40 Logic Elements capable of doing the following....
1. accept a serial input
2. expand it to 48 bit parallel
3. Decode it and provide a 48 bit output
(Decoding will mostly be binary to seven segment)
Each logic element has a 4 bit LUT
Please help... thanks!