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CPLD for IO expansion and decoading

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Advanced Member level 1
Oct 7, 2011
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Delhi, India
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Hello! I am new to CPLDs...
I am working on a project and in the middle it has been decided to include a more advanced LED panel than what was planned initially.
This would require additional 40 to 45 IO pins than already available on the MCU. There is also a need for decoding the MCU output signal, eg binary to seven-segment.
I thought of using decoders for decoding and IO expansion. However, it appears that the MAX V CPLDs are actually cheaper than multiple decoders and also occupy less space.
I do not have much of experience with VHDL and other HDL languages.And at this point I cannot even afford to spend more than say, two weeks to learn a new software or language.
I have a few questions before beginning to design with a CPLD

Is a CPLD with 40 Logic Elements capable of doing the following....
1. accept a serial input
2. expand it to 48 bit parallel
3. Decode it and provide a 48 bit output
(Decoding will mostly be binary to seven segment)
Each logic element has a 4 bit LUT

Please help... thanks!

A MAX V LE has 1 register (D-FF) per logic element. Therefore to get a 48-bit parallel output you'll need at least 48 D-FFs. So I don't think the part with 40 LEs fits your requirements.

If the 48-bit output is required to be static during shifting in of the serial input then you'll need to double the number of FFs required as you'll have to double buffer the 48-bits.

Thanks for the reply!

The refresh rate of the LED is nearly 100Hz and the CPLD runs at over 100MHz.
Can time division multiplexing be of help. As in, if 48 LEDs have to be on then 24 will be ON for half the duty cycle and the rest 24 for the other half. At 100Hz I don't suppose there will be flickering because of a less than 100% duty cycle.

Will this effectively reduce the number of FF from 48 to 24... plus a few additional required for multiplexing?

Macrocells required for 8 bit binary to BCD converter

How many macrocells are required to convert an 8 bit binary number into BCD?

with a 4 input lut...
You need at least 3 LUTs per bcd bit...3*4-bit*3-digits (0-255) = 36 LUTs

So you would probably be using at most 36 macrocells. The synthesis tools may find some optimizations that I'm not willing to figure out by hand.

Not sure about your other question as I don't know what the interfaces that you have to communicate with the LED and the micro.
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