swapnil_vlsi
Full Member level 1
i am doing downloading to cpld xc95108-20tq100.
i get the file .jed which to be downloaded to cpld.
i implementded the jtag cable as per the xilinx ........schematics..
then i Erase the program complete successfully, then
program get downloaded Programming completed successfully.
but then i verify the code it get failed shows an error
Verification failed'1': Verification terminated
why so happend is it hard ware problem or else some thing............
i get the file .jed which to be downloaded to cpld.
i implementded the jtag cable as per the xilinx ........schematics..
then i Erase the program complete successfully, then
program get downloaded Programming completed successfully.
but then i verify the code it get failed shows an error
Verification failed'1': Verification terminated
why so happend is it hard ware problem or else some thing............