I don´t know about MIPI, but a 10 seconds internet search leads me to MIPI.ORG. There they write:MIPI uses a Parallel bus
The MIPI Display Serial Interface (MIPI DSISM) defines a high-speed serial interface between a host processor and a display module.
Basically, this would be the scheme I want to achieve.
View attachment 150432
I have no specifications from the camera nor the screens. And I also haven't been informed about the finallity of the project.
The camera goes through MIPI and CSI-2 specification, that's all what I know.
On the Internet I have found SPI to MIPI and MIPI to N MIPI.
The FPGA to use is a Lattice ice40, which hasn't an integrated CPU. So we must connect it to an ARM somehow, I have been told to investigate to do it in SPI, but I'm not sure that's possible.
Hello,
the FPGA board you mention is not proper for video procesing (not enough resources) - even simple like for example edge detection (with use of Sobel filter). You need SoC FPGA (CPU+FPGA fabric) best with MIPI interface for camera. For example "Zybo Z7":
https://reference.digilentinc.com/reference/programmable-logic/zybo-z7/start
With this board "Zybo" you can use "Vivado HLS" for converting C/C++ algorithm (for example "Sobel filter") into HDL language, and optimize it for paraleling. Then you can write program for ARM CPU (for aquisition of image/video and put it together with Soble filter on FPGA fabric).
Regards
Hello again.
View attachment 150448
In the image from above, Lattice guys are making a SPI to MIPI converter.
What we are looking for id for the inverse operation.
I have found the module MIPI DSI RX, wich would get the MIPI signal: https://www.latticesemi.com/dsirx
Also the pixel to byte converter, but I think I can't connect both of them, their output/input seems quite different: https://www.latticesemi.com/Product...roperty/IPCore/IPCores04/PixeltoByteConverter
And the Compress module, it is missing I guess, so I think I can't do the operation.
About what you comment, I'm not sure yet if is possible or not, but I would say we need a better FPGA. Lattice also has their own IDE and IP Cores.
Of course it's possible to connect a camera and a display as sketched. The interesting question is, what do you want to display? You can't send real time video through SPI. It's all about the intended image processing functionality of your design, not the interfaces.I know that I am going from Gigabit/s to 10MB/s, so from the beggning it doesn't seem a good idea to go for SPI. Anyway, is it possible to make the opposite as I explained? In case it isn't, what would be the best idea?
What specifications?in order to match the specifications.
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