Core utilization improvement

[Peter Chang]

Hi,

Recently, I have a 0.13um process design which has a core utilization 55.7 %
at pre-CTS stage. The chip size is 1800um x 1750 um. The core utilization
seems not so well. Is it possible to improve? After CTS, will it be changed?
Suppose, clock tree was grown at first, wasn't it? Therefore, it won't be
changed, I think.

Regards,

Peter:-|

 

[rca]

you need to reduce the core size and you will increase the core utilisation.
or do you have a floorplan pad-limited which means the number of pad impose the overall chip area or core-limited which means the core area limit the reduction of the chip area and you "will" lost some area in the pad ring.
your chip could be also bump-limited, which means due to the bump pitch and the number of bump you have, you need at least this area which is higher than the pad+core areas.

 

[kck_246023]

core utilization is the factor decides the Floorplan
floorplan
1.pad-limited
2.core-limited
in power plan we do
1.by power bumps
2. by power stripes
consider congestion also
consider all these aspects
u need to reduce the core/die area. for better improvement of core utilization

 

[Peter Chang]

Can we keep the design size and increase the utilization by just
doing some more efforts on the floorplan or routing?

Peter

- - - Updated - - -

core utiliztion is a factor decides the floorplan or
floorplan is able to improve the utilization?
I think both floorplan and routing are able to
improve the utilization.

Peter

 

[kck_246023]

yes,by the time of Floor plan & placement ur chip will be 60-70% utelised

so u need to take care for routing of clk & signal

 

[soloktanjung]

Hi,

Recently, I have a 0.13um process design which has a core utilization 55.7 %
at pre-CTS stage. The chip size is 1800um x 1750 um. The core utilization
seems not so well. Is it possible to improve? After CTS, will it be changed?
Suppose, clock tree was grown at first, wasn't it? Therefore, it won't be
changed, I think.

Regards,

Peter:-|

Reduce the height and width of your core area so that initial core utilization increase to about 60% (i think 60% utilization is a good start). Later when you perform CTS and routing, it will increase the core utilization (perhaps until 80%) because the tool will add many repeaters to your design.

 

[Peter Chang]

KCK,

Thanks.

Peter

- - - Updated - - -

If my design is a core limit, to improve the core utilization, needs to reduce the core size?
Or, we can try to do some more efforts on the floorplan and routing?


Peter

- - - Updated - - -

Suppose, for pad limited or bump limited, the utilization is going to be limited
by the pad number and bump, isn't it?


Peter