Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

cordic corde with error how can i solve it

Status
Not open for further replies.

mr54852

Newbie level 1
Joined
Feb 20, 2015
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
13

Code VHDL - [expand]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
library ieee;
use ieee.std_logic_1164.all;
use fixed_pkg_c.all;
entity cordinate is
generic(n:integer:7);
port(x0:in sfixed(5 downto -10):="00000010011011011";
     y0:in sfixed(5 downto -10):="00000000000000000";
     z0:in sfixed(7 downto -14);
     clk,start:in std_logic;
     done:out std_logic;
     sin,cos,z:out sfixed(7 downto -14));
     end cordinate;
architecture cordinate of cordinate is
type araye is array (7 downto 0) of sfixed(5 downto -10);
type araye1 is array (8 downto 0) of sfixed (7 downto -14);
constant teta:araye:=(
 "1100010000000000",
 "0110101001000011",
 "0011100000100101",
 "0001110010000000",
 "0000111001000000",
 "0000011100101001",
 "0000000111001010",
 "0000000011100101");
 signal a,b,c,d:araye1;
 begin 
process(clk,rst,start)
begin
a,b,c<=(others=>'0');
a(0)(5 downto -10)<=x(0);
b(0)(5 downto -10)<=y(0);
c(n)(5 downto -10)<=teta(n);
d(0)<=z0
for i in (0 to 7) generate
if (z0>=("00000000000000000000000000")) then a(i+1)<=a(i)-(b(i)srl(i)),b(i+1)<=a(i)+(b(i)srl(i)),d(i+1)<=d(i)-c(i);
else a(i+1)<=a(i)+(b(i)srl(i)),b(i+1)<=a(i)-(b(i)srl(i)),d(i+1)<=d(i)+c(i);
if d(i+1)<=(other=>'0') then done<='1',sin<=a(i+1),cos<=b(i+1),z<=d(i+1);
end if;
end if;
end process;
end cordinate;

 

FvM

Super Moderator
Staff member
Joined
Jan 22, 2008
Messages
48,954
Helped
14,343
Reputation
28,950
Reaction score
13,086
Trophy points
1,393
Location
Bochum, Germany
Activity points
282,427
Is it asking to much to expect an explanation of observed errors?

At first sight, there are many trivial syntax errors. How about processing the compiler error messages top down, having a VHDL text book or tutorial at hand?
 
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top