Conway's Game of Life Question

[tszawars]

Hi everyone, I am doing Conway's Game of Life on VHDL to implement on the NEXYS2 development board by DIGILENT. So far we have the user interface working just fine but we are not sure how to utilize the distributed RAM component which is external to the FPGA chip in order to populate the addresses with 1's and 0's which will turn on squares or turn them off. How do we use the RAM? I've never used dual-port RAM's for reading and writing on the rising edge and falling edge of the clock.

 

[mrflibble]

How much ram do you need for this purpose? You can ofcourse use the external ram, but if this is your first project ... there will be a bit of a learning curve. Using the fpga internal resources (block rams) is an order of magnitude simpler. So if your memory requirements are modest then I would seriously consider using just the BRAMs. So how much ram do you need?

 

[tszawars]

Well, the grid is a 30x30 so 900 squares will be filled (meaning there are at least 900 addresses). The way we have it right now is the ram depth is 2048 so that we can write the present state values to the first half of the ram and send the next state values from the second half of the ram (after the rules have been applied) to the VGA controller. Each value will be a 1 or 0 depending on if the square is going to be on or off after the rules are defined. We are using 1024 for read and write because we thought it would be convenient to just flip a bit.

we were thinking of using the external ram outside of the SPARTAN3E. The way we have it right now is I made the distributed cellular ram component with COREGEN but I'm not sure how to write/read value to it. Do I create a separate component that takes values to the ram and portmap it all together?

We already have the state_machine and rules ready. In fact we have the user interface with the grid painted on the screen also. It's just a matter of taking values into the ram and then outputting them into an updater component and the vga controller component.

 

[TrickyDicky]

2048 entries should be fine for internal block ram. That way you dont need an external ram controller. Internal ram can only be accessed on rising or falling edge though, not both.

 

[tszawars]

So using a simple-dual port BRAM would work out for this kind of project? I created it and I'm still not sure how to use it. Is there a way to hard code values into the addresses just to see if it works and populated the screen?

 

[mrflibble]

That amount should indeed easily fit into a BRAM. And lets put it this way, if you have problems getting a bram to work don't even think about using the external ram on the nexys2. Hint: it's a bit more difficult than using BRAMs.

As for using BRAMs... in core generator when you are putting together the dual port bram, there's also the documentation button that should open the relevant pdf.