convert verilog to spice file to perform LVS(calibre)

[aifi]

calibre, verilog lvs

hi all...

to perform LVS using calibre, we need spice file as our source and compare with the layout. i heard that we have to exclude the dummy pads in our design before doing LVS,is it true? if yes, how to exclude that pads if i used Encounter(cadence) as my APR tool.

thanks

 

[crazy_man]

verilog lvs calibre

When you write out a netlist from Encounter using the saveNetlist command, it has a -excludeLogicCell attribute, which can be used to eliminate all unwanted cell types from the verilog. This verilog can be used to get the source spice with v2lvs