Convert verilog gate netlist to hspice transistor netlist?

[eruisi]

transistor netlist

We tried nettran or icfb to convert a verilog gate-level netlist to spice transistor level netlist. However, we found these tools need the transistor information for standard cells to perform a complete translation. Otherwise, they simply do the syntax converting.

Can anyone tell me how to get those transistor information for standard cells and how to use them in nettran or icfb?

Thank you very much!