Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Convert 50MHZ to 400KHZ using spartan 3

Status
Not open for further replies.

EDA_hg81

Advanced Member level 2
Joined
Nov 25, 2005
Messages
507
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,298
Activity points
4,808
Code:
ini: process ( armclkout, inistatus )
        begin
             if ( rising_edge( armclkout ) ) then
                 soiclkcon <= soiclkcon + 1;
                 if ( soiclkcon = spiclk_gen ) then
                     soiclkcon <= x"00";
                     spiclk    <= not spiclk;
                 elsif (  soiclkcon = x"1F" and  spiclk = '0' ) then
                     case inistatus is 
                         when x"00" =>
                             ..
                         when x"01" =>
                             ..
                         when others => null;
                         end case;  
                    end if;                 
               end if;
        end process;

In this code I am using a clock divider to generate a new clock from 50MHZ to 400KHZ.

“elsif ( soiclkcon = x"1F" and spiclk = '0' ) then” this line is used to capture data in 400KHZ domain.

The FSM is use for data processing in 400KHZ domain.

Do you think this structure is good or not?

Thank you for your any suggestions.
 

1. inistatus SHOULD NOT BE PUT IN SENSITIVITY LIST ֱ

2. YOU HAVE CONTENTION ON soiclkcon - soiclkcon <= soiclkcon + 1;
 

    EDA_hg81

    Points: 2
    Helpful Answer Positive Rating
Hello,

regarding the comments

1. inistatus in the sensitive list doesn't have any effect, it's simply superfluous. I guess, it could be from a temporarily removed reset condition.

2. multiple assignments to a signal within a sequential block create well-defined behaviour, thus it's not an error and, as in the example, may be used shorten the code. But I agree, that for clarity and reuseability, I should be better avoided.

Regards,
Frank
 

    EDA_hg81

    Points: 2
    Helpful Answer Positive Rating
Generate 400KHZ clock using Spartan3

I don't think it is good because your syntizise tool will have a chlenge to implimented and might not recognize state machine

Firstival I am using you running SPI device (by your signal name) then why do you have to be so accurate with output frequncy. Use regular counter to divide your input frequncy and use that signal to drive your SPI

then in your state machine

a <= '1' when soiclkcon = x"1F" and spiclk = '0' else '0';
inistatus1 < inistatus & a;

.................

case inistatus1

when "000000001" =>

......

Please also pay attention if you have big state machine becaise it seems your FSM can take up to 256 states


good luck
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top