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Control signals in most of the IC's are active low why?

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Most of the control signals such as reset, CE, etc. in most of the IC's are active low why?
 

the common usage for us! you can also use the protocol you define!
 

STD cell designers can give the better answer.

I can only assume that during active low reset design will consume less power. Or in this case it is possible to design flipflop with less transistor.

Bests,
Tiksan
 

It's a legacy from TTL and NMOS logic. With CMOS, none of both polarities brings an advantage.
 

Active low reduces leakage power.
 

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