control logic for SAR ADC

[nijMcnij]

successive approximation register

hello all,

i am designing a 10 bit charge redistribution Successive approximation register (SAR) ADC, the analog parts are easy to figure out and simulate, but the digital logic part which controls the switches and the SAR register is a bit tricky.

can anyone advise on that, maybe point out a relevant reference.

all papers that i got so far about the subject just deal mainly with the analog functionality of the ADC.

many thanks

 

[Syukri]

sar logic

SAR logicfunction:
1. Run binary searching
2. Storing comparator output
3. Register finish storing 10 bit give output signal and trigger another sample signal
4. Input to DAC

 

[nijMcnij]

sar adc

thank you suykri for your assistance

 

[anhtuan]

sar adc thesis

SAR logicfunction:
i think you know clearly ,so can i ask you some questions?
i'm having thesis about design SAR ADC 8BIT ,but i haven't got schematic .if you have ,please send to me mail it to me ,thanks you very much .my mail address "panda251082@yahoo.com
"

 

[crossbow_123]

sar adc logic

hello all,

i am designing a 10 bit charge redistribution Successive approximation register (SAR) ADC, the analog parts are easy to figure out and simulate, but the digital logic part which controls the switches and the SAR register is a bit tricky.

can anyone advise on that, maybe point out a relevant reference.

all papers that i got so far about the subject just deal mainly with the analog functionality of the ADC.

many thanks

hi, you can refer to the book of Allen, it tell the SAR design, and have the logic figure.

 

[fghij]

sar-adc1.pdf

can i download the file, i'm a freshman been here

 

[endrawan]

digital logic in adcs

Can I download SAR-ADC1.pdf?
Iam new in here, but I need.
Could you send it to endrawan04@students.ee.itb.ac.id
Thank you.

Endrawan

 

[iiiiisland]

digital sar logic

thank you!
I am also designing a 10 bit sar adc. How to eliminate the offset of the comparator is the biggest problem for me as well as the accuracy problem.

the simulation results show the error is a little less than 1mv, but it have not contain the offset effect.

how about your DAC array? Do you take the M+L method?

thank you very much for your help!