Continuous-time Sigma Delta Design

[thikgaidep]

hello,

I am designing a CT Sigma Delta ADC. I just know there are 2 methodologies: one is designed based on Discrete time SD, and the other is based on designing a CT loop filter as the starting point. I would like to ask which one is better and why. If both of them are not very good, if there are any better methods or not? I would be much appreciated.

Thank you and Yours sincerely,
thikgaidep

 

[pcca]

Hello, thikgaidep

I am starting to work with CT Sigma-Delta in my master dissertation. Well, I studied both techniques, and I prefer the first one. It has more documentation, and a lot of papers dealing with.

Also, you can compare the responses of th DT loop and the CT after transformation.

A good book to read (with a lot of information) is: Continuous-Time Sigma-Delta A/D Conversion: Fundamentals, Performance Limits and Robust Implementations, by F. Gerfers, M. Ortmanns.

I hop to help you.

Regards.

 

[thikgaidep]

thank you pcca,
Have you read the paper: A 70-mW 300-MHz CMOS Continuous-time SD ADC with 15-MHz Bandwidth and 11 Bits of Resolution JSSC 2004? In the paper, the method designing CT loop filter as the starting point is discussed. I think it is a straight option escaping from large deviation of CT SD from the original DT design. I wonder if this method is more accurate and stable or not? Do you guys have any ideas on it.

Thanks,
thikgaidep

 

[pcca]

Hello, thikgaidep.

In fact, I did not read the paper you cited. At this moment I am performing some simulations to evaluate clock jitter influence in CT SD modulators.
I am simulating modulators with NRZ and SCR DACs in Simulink.

To design my CT modulators I start with the sigma-delta toolbox (https://www.mathworks.com/matlabcentral/fileexchange/19) to find the apropriate NTF and after that I perform the DT-CT tranformation.

Regards.