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Constraints in a design

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DocIng

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I used RTL compiler from cadence.
define_clock -period 100000 -name clkin /designs/TOP/ports_in/CLK

Error : A required object parameter could not be found. [TUI-61] [path_group]
: An object of type 'instance|external_delay|clock|port|pin' named '' could not be found.
: Check to make sure that the object exists and is of the correct type. The 'what_is' command can be used to determine the type of an object.

I dont undesrtand the problem.
 

You need speicfy which PIN or Port this clock is mounted on.
In DC (synopsys Design compiler), there is some command like: get_pins "/designs/TOP/ports_in/CLK" to get that port or pin.

Or you can "man define_clock" in RC tool to get help and see some examples.
 

Every port, bus, clock, subdesign and constraints are stored as virtual foldersaccessible from RTL Compiler command window.
the top level input ports are stored in /designs/TOP/ports_in
clkin will be connected to CLK input of TOP module
get_pins /designs/TOP/ports_in/CLK cannot find any pins.
 

try this
define_clock -period 100000 -name clkin [find / -port CLK]
 

Every port, bus, clock, subdesign and constraints are stored as virtual foldersaccessible from RTL Compiler command window.
the top level input ports are stored in /designs/TOP/ports_in
clkin will be connected to CLK input of TOP module
get_pins /designs/TOP/ports_in/CLK cannot find any pins.

you cannot use the command get_pin on a port.
 

I used RTL compiler from cadence.
define_clock -period 100000 -name clkin /designs/TOP/ports_in/CLK

Error : A required object parameter could not be found. [TUI-61] [path_group]
: An object of type 'instance|external_delay|clock|port|pin' named '' could not be found.
: Check to make sure that the object exists and is of the correct type. The 'what_is' command can be used to determine the type of an object.

I dont undesrtand the problem.

Try this : define_clock -period 100000 -name clkin [get_clocks CLK]
 

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