Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Constant Nets DRC Violations

Status
Not open for further replies.

zxvc

Newbie level 5
Joined
Jan 4, 2009
Messages
9
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
Taiwan
Activity points
1,360
Hi,

My APR tool is IC Compiler.
I connected all constant nets to tie cells.
After routing, the timing analysis showed there were max_capacitance vioations
at constant nets driven by tie cells and I couldn't fix them.

Could I ignore the constant net DRC violations?
Do these violations make any functional errors?
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top