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connect unused input pins direct to ground or via resistors?

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xuexucheng

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For unused input pins of CMOS logic gates circuit or other digital CMOS circuit, how to handle them? I know they must be conneted to logic 1 or logic 0. But shall we connect direct to ground or power, or shall we connnect to ground or power via resistors? I like to connect direct to ground, because this is simple and there is no resistor, so the comonents number is low, and the caculation reliability should be high. However, I find some method in a datasheet of UT54AC164245, they give "It's good design practice to tie the unused input to VSS via a resistor to reduce noise susceptibility. The resistor protects the input pin by limiting the current from high going variations in VSS."
by limiting the current from high going variations in VSS --- I do not understand the current. Could you give some your opinion?
 

cop02ia

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For unused input pins of CMOS logic gates circuit or other digital CMOS circuit,
Erm, this is the analog section, so, maybe you're asking in the wrong place?
Or is that it you're customizing your own standard cells in an analog/mixed-signal design?

For digital design, most engineers I know connect spare standard cells to the ground rails directly.
Ground/VSS nets can be susceptible to ground bounce issues & decoupling capacitors can be used to minimize this - so, no need for resistors (it would be a pain for LVS, too).

But if you want to protect your ground nets in analog design, I don't think it would be expansive (area-wise & design time) to put in a few slightly high-impedance resistors.
Of course, I'm assuming your design is not really tightly matched.

I-FAB
 

xuexucheng

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Yes, this is a digital circuit. But I think the problem is a analog problem!
 

lamoun

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Hello, xuexucheng

To understand the current you must think of the input capacitance of the gate/pin.
If high speed voltage variations exist at the gate terminal, then it means that a high-value current is charging/discharging the input capacitance of the pin.
Adding a resistor limits this current.

Noise-wise, having lower current demands, the decoupling capacitors will more easily filter the supply variations.

It also limits the current in case of electrostatic discharge, but you have the internal ESD protection diodes to deal with that.

Considering your design, if resistor count is important, you can try a prototype with out the resistors.
In my opinion if your design is mostly digital, or you just don't really care for an extra stable and noise-free VDD and VSS, it should work just fine.

Lampros
 
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