All the circuits need some power and will draw some current (quiescent current)even when the P/S does not produce any output current. Think of the oscillator, error amplifier, reference, etc. All these parts need some current to operate. This translates into power loss, which does not contribute anything to output power.
When the power supply is operating at light load, the quiescent currents begin to represent a significant portion of the total power, so the overall efficiency drops.
At high power, it is possible for the efficiency to drop (though not always), because losses do not vary linearly with the current. Take for example the output choke, whose resistcance will produce a power loss that is proportional with the square of the current. That will make the choke lose power non-linearly with output current. If the resistance is such that at the maximum output current these losses become a significant portion of the output power, then efficiency will drop.
A similar case is that of the MOSFET's, whose conduction losses vary with the square of the RMS current through them. Again, this is a non-linearity which can translate in decreased efficiency. Even the ESR of the caps will produce losses that increase with the square of the RMS currents through them and so are higher at higher output currents.
It is possible to design a P/S whose efficiency is at its peak at the maximum output power.
Typically, however, as a designer you will calculate these losses, based on the calculated currents/ voltages, and select adequate components, so as to meet the MINIMUM efficiency requirement at full power. (Note that even though the efficieny drops, it must still be above the specified minimum). Thus, this way you can compromise and choose a cheaper transistor or choke for instance (cost is also a design parameter), with a higher Rdson or DC resitance respectively, knowing it will result in lower efficency at maximum current, as long as you meet the minimum efficiency.
Conduction loss is done of course for each part by multiplying its resistance with the square of the RMS current through the device. Switching losses are a little more complicated, but essentially you integrate the power loss over the duration of the switching interval, assuming the current and voltage across the switching devices vary linearly. The switching interval is established by you, taking into account other factors, such as available drive current vs. input capacitances (for MOSFETs, for instance). Approximate formulas are available.
A good book is Abraham I. Pressman's "Switch-mode power suplies". You can also go to websites, such as ON Semi, National, Linear Tech, or TI and look for design tips.
On the TI website you can find the Unitrode Seminars, which contain many design equations. Try for instance SEM1200 and look at the 140W converter.
https://focus.ti.com/docs/training/catalog/events/event.jhtml?sku=SEM401011§ion=Overview