# Composite video FET source follower

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#### TQFP

##### Junior Member level 3
Greetings,

I'm working on a video project and I need to reproduce a composite output that matches an existing device (the TMS-9918A if you want to know.) Let me try to be as brief as possible. I am a little confused by the original device's output, which according to the data sheet is:

Vwhite: 3.0V
Vblack: 2.3V
Vsync: 2.0V

Test conditions: RL = 470ohms

The datasheet also states:

"The TMS9918A composite video output pin (36), is driven by a source-follower MOS transistor that requires an external pull-down resistor to Vss. A 470-ohm resistor is typically used to provide a 1.9 volt peek-to-peek signal on the output. This output will drive most color directly, although in some cases it may be necessary to provide a simple interface circuit to match the monitor's input requirements."

This brings up a few questions. Why would the chip output 2.0 to 3.0 volts in to a 470-ohm load when standard composite video (from what I have found) is 0V to 1V into a 75-ohm load?

Also, the text says that the output into a 470-ohm load will be a 1.9 volt peek to peek that can drive a monitor directly!? This does not match the other specs in the datasheet that show the proper 1V difference, albeit 2V higher than standard, and into a different load.

I'm not looking for color output, but I'd like to do at least black, white, and gray, which I found some info for doing with two digital outputs and two resistors, like this:
Code:
5V-TTL [D1] ---(900 ohm)---+
|
5V-TTL [D0] ---(450 ohm)---+
|
---(75 ohm in monitor)---
|
V (gnd)
This site (**broken link removed**) shows how this can drive a composite signal and provides the 4 basic voltages:

0V for sync with D1 and D0 at ground
.3V for black with D1 at ground and D0 at +5
.67V for gray with D1 at +5 and D0 at ground
1V for white with D1 and D0 at +5

This is great, except I'm using a 3.3V source (I found another site that used 600 and 300 ohm resistors instead), and my target load is 470 ohms instead of 75. I also need to throw a FET in there and produce voltages from 2.0 to 3.0. I guess?

My current design is something like this:
Code:
                                  +5V
3V-LVTTL [D1] ---(900)---+         |
|       |<+
3V-LVTTL [D0] ---(450)---+-------|   (FET)
|       |<+
(75-ohm)     |
|        ???
V (gnd)
Sorry for the lousy schematic. Basically I'm using the same input circuit as described on the site I found (above) to make the 0, .3, .67, and 1V signals, which I'm developing via the 75-ohm resistor, and using that as the input to the FET. However, how do I make the output of the FET swing from 2V to 3V with a 470-ohm load, when the gate goes from 0V to 1V?

This is all hypothetical at this point (nothing built or proven), and any insight would be greatly appreciated.

Thanks,
Matthew

##### Super Moderator
Staff member
is driven by a source-follower MOS transistor that requires an external pull-down resistor to Vss. A 470-ohm resistor is typically used to provide a 1.9 volt peek-to-peek signal on the output. This output will drive most color directly, although in some cases it may be necessary to provide a simple interface circuit to match the monitor's input requirements."

This brings up a few questions. Why would the chip output 2.0 to 3.0 volts in to a 470-ohm load when standard composite video (from what I have found) is 0V to 1V into a 75-ohm load?

Also, the text says that the output into a 470-ohm load will be a 1.9 volt peek to peek that can drive a monitor directly!? This does not match the other specs in the datasheet that show the proper 1V difference, albeit 2V higher than standard, and into a different load.

Supposition on my part...

If you change the 470 ohm pull-down resistor to 75 ohm, you will probably see the output assume the standard levels you expect.

I think they recommended 470 ohm as a middle value in order to handle an unknown variety of devices that might be connected.

Example, in case you connect a high impedance device, the output waveform might not go to zero V at the times it's supposed to. To ensure proper waveform at the output, a pull-down resistor is needed. But since there might be higher than standard V levels at times, they might tell you to use a 330 ohm pulldown resistor.

However they probably expect you to attach a 75 ohm load as next stage. A 470 ohm will not draw away too much signal to ground. And if you attach a 50 ohm load, they might tell you to omit the 470 ohm resistor so that you'll get that much more voltage swing.

---------- Post added at 23:18 ---------- Previous post was at 22:58 ----------

My current design is something like this:
Code:
                                  +5V
3V-LVTTL [D1] ---(900)---+         |
|       |<+
3V-LVTTL [D0] ---(450)---+-------|   (FET)
|       |<+
(75-ohm)     |
|        ???
V (gnd)
Sorry for the lousy schematic. Basically I'm using the same input circuit as described on the site I found (above) to make the 0, .3, .67, and 1V signals, which I'm developing via the 75-ohm resistor, and using that as the input to the FET. However, how do I make the output of the FET swing from 2V to 3V with a 470-ohm load, when the gate goes from 0V to 1V?

This appears to be a normal amplifier configuration for an FET. They conduct when the gate goes down to 0V.

No need to provide bias current via a resistor network as with a regular transistor.

You take the output from the drain or source (whichever gives best results) as with a transistor. To get your desired output volt levels you'll have to experiment, with resistors placed above or below the FET, attached to supply or ground, depending.

To pinch off FET current flow you would need to bring the gate down to -2 V. Strange beasts.

---------- Post added at 23:22 ---------- Previous post was at 23:18 ----------

is driven by a source-follower MOS transistor that requires an external pull-down resistor to Vss. A 470-ohm resistor is typically used to provide a 1.9 volt peek-to-peek signal on the output. This output will drive most color directly, although in some cases it may be necessary to provide a simple interface circuit to match the monitor's input requirements."

This brings up a few questions. Why would the chip output 2.0 to 3.0 volts in to a 470-ohm load when standard composite video (from what I have found) is 0V to 1V into a 75-ohm load?

Also, the text says that the output into a 470-ohm load will be a 1.9 volt peek to peek that can drive a monitor directly!? This does not match the other specs in the datasheet that show the proper 1V difference, albeit 2V higher than standard, and into a different load.

Supposition on my part...

If you change the 470 ohm pull-down resistor to 75 ohm, you will probably see the output assume the standard levels you expect.

I think they recommended 470 ohm as a middle value in order to handle an unknown variety of devices that might be connected.

Example, in case you connect a high impedance device, the output waveform might not go to zero V at the times it's supposed to. To ensure proper waveform at the output, a pull-down resistor is needed.

However they probably expect you to attach a 75 ohm load as next stage. A 470 ohm will not draw away too much signal to ground. And if you attach a 50 ohm load, they might tell you to omit the 470 ohm resistor so that you'll get that much more voltage swing.

#### TQFP

##### Junior Member level 3
Supposition on my part...
If you change the 470 ohm pull-down resistor to 75 ohm, you will probably see the output assume the standard levels you expect.

Interesting thought, I might just have to test that.

However they probably expect you to attach a 75 ohm load as next stage.

Every system that I have looked at that uses the original chip all have some sort of "next stage" connected to the output pin. Most of them have a few inductors, a resistor, and some caps. I'm guessing probably a band-pass filter...

This appears to be a normal amplifier configuration for an FET. They conduct when the gate goes down to 0V.

Yeah, I'm new to trying to do FET design, and when I drew my little schematic there, I was assuming an "enhancement" mode MOSFET, i.e. not conducting until there is a gate voltage. I didn't realize until after I posted that the normal mode for FETs is probably conduction with 0 volts. Not sure it if matters?

Thanks for the feedback, I'll try to get something going, but analog video circuits are definitely a stretch for me. Too many questions and suppositions. I wonder if the designers of the circuits I'm looking at got it right on paper, or if their designs only worked after a lot of trial and error with part values?

Matthew

##### Super Moderator
Staff member
I wonder if the designers of the circuits I'm looking at got it right on paper, or if their designs only worked after a lot of trial and error with part values?

We can never be sure. Experimentation by us is part of the process. You may be closer to success than you realize.

The designers are motivated to make an IC they can sell by the millions, for commercial use.

They won't feel too bad if we hobbyists have to buy an extra or two to replace the one that fried in our experimental circuit. They sell more that way.

As for me there's been times I fried an IC and gave up rather than buy a second one.

Datasheets ought to come with a troubleshooting guide. 'If you get zero output, then your xyz is too high.' Or 'if you get overmuch power drain, your xyz is too low.' Etc.

You can bet the designers went through the same process when creating the prototype IC.

And what if we asked them why they don't do include troubleshooting tips?

I imagine they would say 'the datasheets would be 10 times as voluminous as they are now. Besides the boss told us not to write anything that makes our chip look like it's a problem to use.'

#### FvM

##### Super Moderator
Staff member
Your discussing a source follower. To get a positive voltage shift, you obviously need a depletion type, e.g. a standard JFET. A BF245C would roughly achieve a 2 to 3V shift with a 470 ohm source resistor. But there some drawbacks:
- the finite gm respectively the 1/gm output resistance will cause a < 1 gain
- the output resistance will be much higher than 75 ohm
- the limited supply voltage will further degrade the circuit behaviour
- the roughly defined JFET parameters will require individual tuning of Rs
- a temperature dependant offset can be expected

All in all, it sounds more promising to shift the input voltage to 2 - 3 V + 0.7 V by modifying the resistor network and use a BJT follower, or use a resistor network without follower. Ultimately, you would use a feedback amplifier.

P.S.: You quoted the TMS9918A datasheet. You can expect, that the output transistor is an enhancement mode NMOSFET, so the respective gate voltage will be considerable different from your example circuit. Also most likely not genereted by a low impedance resistor network.

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