comparator simulation problem

[lhlbluesky]

i'm designing a dynamic latched comparator,when latch=1,reset;when latch=1,work

when i set latch=0,and give a pulse or pwl stimulus in one end (the other end to a fixed level),it works well.

however,when i give a clock pulse and a input pulse stimulis together,the output don't
change with the input pulse,it's just like that i give a individual input value only ,not a pulse or pwl ,i don't know why.

please help me ,thanks first

 

[klug]

User "siskam" wrongly posted reply in report sistem. I quote it here for you:

Hi! I simulated comparator too (in the Protel 99). Did you used pull-up resistor on the output of the IC? Try trim its value (cca 10k Ohm @ 5V supply). Some IC need by-pass capacity (10x pF) from output to input (+) parallel to resistor. Try change a rise and fall time in signal generator in the simulation system setup. Martin