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Comparator offset / nosie simulation

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steadymind

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i am designing a comparator for a adc. when i run a transient simulation i am able to find minimum voltage (resolution) needed for the output to change to the correct value. however when i run dc sweep i an not able to get the offset / minimum voltage (resolution) ?

the comparator is made up of pre-amp (gain of 20) and StorngARM latch.

I also want to know how to find noise at the comparator ?
 

JoannesPaulus

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The resolution of the comparator is not defined by its offset: the comparator could still be able to discriminate (or resolve) a voltage difference of 1uV at its inputs while still having 10mV of systematic offset.

At any rate, the offset you see in the transient simulation is a dynamic offset due to many parameters, for instance due to kick back from the clock, charge injection if you use switches before the comparators for auto-zeroing, and so on... in the DC simulation you only see the systematic offset.
 

steadymind

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Thanks JoannesPaulus for the reply.
i think i should use offset cancellation circuit to remove the dynamic offset. right ?

is it possible to get 1uV offset without a preamp and just any latched comparator.

Anything about how to calculate the input referred noise.
 

love_analog

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No offset canellation cannot remove the kickback noise etc. The only way to do that would be to have higher gain preamp.

Typically strongARm will have larger offset.
 

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