Comparator offset Cancellation

[Monady]

Hi dear all friends,

I designed an 8-bit ADC; this ADC works perfect in normal conditions, but in the presence of mismatch, comparator used in the ADC destroys performance of the whole ADC. I was wondering whether I can change sizing of transistors and find proper values, with trial and error, for getting rid of the offset or I have to use another way like offset cancellation technique. (please take a look at the attached pic of the used comparator)

 

[JoannesPaulus]

You should try to run your simulations with mismatch applied only to pairs of devices, starting from the input pair, moving to the cross-coupled nmos, pmos ans so forth. This will give you an idea about who is biggest contributor to your offset. Consult your design manual to check for the area vs. mismatch for your technology.

 

[Monady]

Tnx for reply. I have done it before and I saw that mismatch of the input pair has the biggest influence on the comparator. Unfortunately, I haven't access to the manual so I have no idea in this regard (I'm using TSMC 0.18um). I'd appreciate it if you could give me even rough estimation about it. Although I tried different aspect ratios/areas for input transistor, I couldn't solve this problem. Now I am mixed up and don't know that ADC designers use which way to cancel offset of comparator with this resolution. I should add that since I have only one comparator, I cannot use averaging technique and I also cannot use auto zeroing technique, I think, because this comparator uses two clocks (PH1 & PH2) for its operations

 

[JoannesPaulus]

I do not think you need autozeroing for an 8-bit ADC. I believe you need to increase the area of your input pair. Let's say that you now have 20/0.18, try 40/0.36, 80/0.72; that is, keep the same aspect ratio but increase the area. Unfortunately I do not have any data for any 0.18um technology.