Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I know that it is approximately zero. Can anyone help me how it become zero from small signal analysis.
What is the final gain equation from small signal analysis?
Since you have terminated the output with equivalent voltage source, the circuits becomes exactly symmetrical -->so the circuit can be folded into one tail source cascoded with Input pair (2w/l) & the nmos load as diode connected with (2w/L) -->Now caluculating gain from Vcm to output -->we will get gdst/gmn (<<<<1) [gdst-->gds of the tail transistor]
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.