[SOLVED] code for nrf24l01 interfaced with pic16f877a

[Pran Kumar]

I hav got this code from mikroelektronika.Will this code work for nrf24l01?If it wont,can anyone help me with the changes to be made in this code.

/*================================================================================
*
* nRF24L01+ using no libraries
* PIC16F877A
*
* Allen Mulvey May 2014
*
* Pull up resistors on PORTC pins 1-5
*
================================================================================*/

#define TX_mode // define TX_mode or RX_mode
#include "nRF24L01.h"

char Data_In[21], Data_Out[21], stat;
const char test[] = "Test message.";
short dataLength = 20;

// You can change these pins as long as your microcontroller supports SPI on the required pins
sbit Irq_pin at PORTB.B0; sfr;
sbit Mosi_pin at PORTC.B5; sfr;
sbit Ce_pin at PORTC.B1; sfr;
sbit Sclk_pin at PORTC.B3; sfr;
sbit Csn_pin at PORTC.B2; sfr;
sbit Miso_pin at PORTC.B4; sfr;

sbit Irq_tris at TRISB.B0; sfr;
sbit Mosi_tris at TRISC.B5; sfr;
sbit Ce_tris at TRISC.B1; sfr;
sbit Sclk_tris at TRISC.B3; sfr;
sbit Csn_tris at TRISC.B2; sfr;
sbit Miso_tris at TRISC.B4; sfr;

// LCD module connections
sbit LCD_RS at RB2_bit;
sbit LCD_EN at RB3_bit;
sbit LCD_D4 at RB4_bit;
sbit LCD_D5 at RB5_bit;
sbit LCD_D6 at RB6_bit;
sbit LCD_D7 at RB7_bit;
sbit LCD_RS_Direction at TRISB2_bit;
sbit LCD_EN_Direction at TRISB3_bit;
sbit LCD_D4_Direction at TRISB4_bit;
sbit LCD_D5_Direction at TRISB5_bit;
sbit LCD_D6_Direction at TRISB6_bit;
sbit LCD_D7_Direction at TRISB7_bit;

// I use a procedure for any delay that is used more than once
void Comm_Delay() {Delay_us(10);} // You can experiment with this delay
void Delay_10() {Delay_ms(10);}
void Delay_100() {Delay_ms(100);}
void Delay_500() {Delay_ms(500);}

void toggleCSN(){
Csn_pin = 1;
Delay_us(20); // You can experiment with this delay
Csn_pin = 0;
Comm_Delay();
}

char *getConst(char dest[], const char source[]){
int i = 0;
while (source[i]) // while (source[i] != '\0')
{dest[i] = source[i]; i++;}
dest[i] = '\0';
return dest;
}

char Get_FIFO_Flags(){
char s;
Ce_pin = 0;
toggleCSN();
SPI1_Write(FIFO_STATUS);
Comm_Delay();
s = SPI1_Read(NOP);
Comm_Delay();
return s;
}

void makeMsg(){ // Put your data in here
memset(Data_Out, ' ', 20);
getConst(Data_Out, test);
}

void fillAckBuffer(){
char i;
Ce_pin = 0;
toggleCSN();
SPI1_Write(W_ACK_PAYLOAD);
for(i=0; i < dataLength; i++) {Comm_Delay(); SPI1_Write(NOP);}
Comm_Delay();
Csn_pin = 1;
}

char readBuffer(){
char i, s;
Ce_pin = 0;
memset(&Data_In, 'a', 20);
fillAckBuffer();
s = Get_FIFO_Flags();
if((s & 2) != 0){
toggleCSN();
SPI1_Write(R_RX_PAYLOAD);
for(i=0; i < dataLength; i++){Comm_Delay(); Data_In[i] = SPI1_Read(0);}
Comm_Delay();
}
Csn_pin = 1;
Ce_pin = 1;
return s;
}

void sendBuffer(){
char i, j;
PORTD.B0 = 0;
PORTD.B1 = 1;
toggleCSN();
SPI1_Write(STATUS | W_REGISTER);
Comm_Delay();
SPI1_Write(0xff); //clear flags
Comm_Delay();
toggleCSN();
SPI1_Write(FLUSH_TX);
Comm_Delay();
//for(j=0; j<3; j++){ // You can load up to 3 payloads
toggleCSN();
SPI1_Write(W_TX_PAYLOAD);
for(i = 0; i < dataLength; i++) {Comm_Delay(); SPI1_Write(Data_Out[i]);}
Comm_Delay();
//}
Csn_pin = 1;
Ce_pin = 1;
Delay_10();
Ce_pin = 0;
}

char init_Radio(){
char i;
Ce_pin = 0; // must be in standby or power down to write
Comm_Delay();
toggleCSN();
SPI1_Write(CONFIG | W_REGISTER);
Comm_Delay();
#ifdef RX_mode
SPI1_Write(PRIM_RX + PWR_UP + CRCO + EN_CRC); // Receiver
#endif
#ifdef TX_mode
SPI1_Write(PWR_UP + CRCO + EN_CRC); // Transmitter
#endif
Comm_Delay();

toggleCSN();
SPI1_Write(EN_AA | W_REGISTER);
Comm_Delay();
SPI1_Write(ENAA_P0);
Comm_Delay();

toggleCSN();
SPI1_Write(EN_RXADDR | W_REGISTER);
Comm_Delay();
SPI1_Write(ERX_P0);
Comm_Delay();

toggleCSN();
SPI1_Write(SETUP_AW | W_REGISTER);
Comm_Delay();
SPI1_Write(AW5);
Comm_Delay();

toggleCSN();
SPI1_Write(SETUP_RETR | W_REGISTER);
Comm_Delay();
SPI1_Write(0xff);
Comm_Delay();

toggleCSN();
SPI1_Write(RF_CH | W_REGISTER);
Comm_Delay();
SPI1_Write(83);
Comm_Delay();

toggleCSN();
SPI1_Write(RF_SETUP | W_REGISTER);
Comm_Delay();
SPI1_Write(RF_PWR + LNA_HCURR);
Comm_Delay();

toggleCSN();
SPI1_Write(RX_ADDR_P0 | W_REGISTER);
for(i=0; i<5; i++){Comm_Delay(); SPI1_Write(0xAA);}
Comm_Delay();

toggleCSN();
SPI1_Write(TX_ADDR | W_REGISTER);
for(i=0; i<5; i++){Comm_Delay(); SPI1_Write(0xAA);}
Comm_Delay();

toggleCSN();
SPI1_Write(RX_PW_P0 | W_REGISTER);
Comm_Delay();
SPI1_Write(dataLength);
Comm_Delay();

toggleCSN();
SPI1_Write(STATUS);
Comm_Delay();
i = SPI1_Read(NOP);
Comm_Delay();
Csn_pin = 1;
return i;
}

// =============================================================================
// =============================================================================

void main(){
//#ifdef RX_mode
char txt[5], dat1;
//#endif
ADCON1 = 0x04; // digital not analog
CMCON = 7; // Comparators off

PORTD = 0;
TRISD = 0; // outputs
Csn_tris = 0;
Csn_pin = 1;
Ce_tris = 0;
Ce_pin = 0; // 1 = listen or transmit

SPI1_Init();
//SPI1_Init_Advanced(_SPI_MASTER_OSC_DIV16, _SPI_DATA_SAMPLE_MIDDLE, _SPI_CLK_IDLE_LOW, _SPI_LOW_2_HIGH);
stat = init_Radio();

Lcd_Init(); // Initialize LCD
Lcd_Cmd(_LCD_CLEAR);
Lcd_Cmd(_LCD_CURSOR_OFF);
Lcd_Out(1, 1, "nRF24L01+");
ByteToHex(stat, txt);
Lcd_Out(2, 1, txt);
Delay_500();

do {
dat1 = 0;
Lcd_Cmd(_LCD_CLEAR); // Clear display

toggleCSN();
SPI1_Write(STATUS);
Comm_Delay();
dat1 = SPI1_Read(NOP);
Comm_Delay();
Csn_pin = 1;
ByteToHex(dat1, txt);
Delay_10();
Lcd_Out(1, 1, txt);
dat1 = Get_FIFO_Flags();
ByteToHex(dat1, txt);
Delay_10();
Lcd_Out(1, 10, txt);

#ifdef TX_mode
Lcd_Out(2, 1, Data_Out);
PORTD.B0 = 1;
PORTD.B1 = 0;
Delay_100();
makeMsg();
sendBuffer();
Delay_100();
#endif

#ifdef RX_mode
Ce_pin = 1;
dat1 = readBuffer();
ByteToHex(dat1, txt);
Delay_10();
Lcd_Out(1, 10, txt);
if((dat1 & 2) != 0) Lcd_Out(2, 1, Data_In);
Delay_500();
#endif
}while(1);
}





/*
Copyright (c) 2007 Stefan Engelke <mbox@stefanengelke.de>


Permission is hereby granted, free of charge, to any person
obtaining a copy of this software and associated documentation
files (the "Software"), to deal in the Software without
restriction, including without limitation the rights to use, copy,
modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:


The above copyright notice and this permission notice shall be
included in all copies or substantial portions of the Software.


THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.

Modified by Allen Mulvey 2014
Under Bit Mnemonics pin numbers were replaced with pin values
*/

/* Memory Map */
#define CONFIG 0x00
#define EN_AA 0x01
#define EN_RXADDR 0x02
#define SETUP_AW 0x03
#define SETUP_RETR 0x04
#define RF_CH 0x05
#define RF_SETUP 0x06
#define STATUS 0x07
#define OBSERVE_TX 0x08
#define CD 0x09
#define RX_ADDR_P0 0x0A
#define RX_ADDR_P1 0x0B
#define RX_ADDR_P2 0x0C
#define RX_ADDR_P3 0x0D
#define RX_ADDR_P4 0x0E
#define RX_ADDR_P5 0x0F
#define TX_ADDR 0x10
#define RX_PW_P0 0x11
#define RX_PW_P1 0x12
#define RX_PW_P2 0x13
#define RX_PW_P3 0x14
#define RX_PW_P4 0x15
#define RX_PW_P5 0x16
#define FIFO_STATUS 0x17
#define DYNPD 0x1C
#define FEATURE 0x1D


/* Bit Mnemonics */
#define MASK_RX_DR 0x40 //6
#define MASK_TX_DS 0x20 //5
#define MASK_MAX_RT 0x10 //4
#define EN_CRC 0x08 //3
#define CRCO 0x04 //2
#define PWR_UP 0x02 //1
#define PRIM_RX 0x01 //0
#define ENAA_P5 0x20 //5
#define ENAA_P4 0x10 //4
#define ENAA_P3 0x08 //3
#define ENAA_P2 0x04 //2
#define ENAA_P1 0x02 //1
#define ENAA_P0 0x01 //0
#define ERX_P5 0x20 //5
#define ERX_P4 0x10 //4
#define ERX_P3 0x08 //3
#define ERX_P2 0x04 //2
#define ERX_P1 0x02 //1
#define ERX_P0 0x01 //0
#define AW3 0x01 //0 3 bytes
#define AW4 0x02 //0 4 bytes
#define AW5 0x03 //0 5 bytes
#define ARD 0x10 //4
#define ARC 0x01 //0
#define PLL_LOCK 0x10 //4
#define RF_DR 0x08 //3
#define RF_PWR 0x06 //6
#define RX_DR 0x40 //6
#define TX_DS 0x20 //5
#define MAX_RT 0x10 //4
#define RX_P_NO 0x02 //1
#define TX_FULL 0x01 //0
#define PLOS_CNT 0x10 //4
#define ARC_CNT 0x01 //0
#define TX_REUSE 0x40 //6
#define FIFO_FULL 0x20 //5
#define TX_EMPTY 0x10 //4
#define RX_FULL 0x02 //1
#define RX_EMPTY 0x01 //0
#define DPL_P5 0x20 //5
#define DPL_P4 0x10 //4
#define DPL_P3 0x08 //3
#define DPL_P2 0x04 //2
#define DPL_P1 0x02 //1
#define DPL_P0 0x01 //0
#define EN_DPL 0x04 //2
#define EN_ACK_PAY 0x02 //1
#define EN_DYN_ACK 0x01 //0


/* Instruction Mnemonics */
#define R_REGISTER 0x00
#define W_REGISTER 0x20
#define REGISTER_MASK 0x1F
#define ACTIVATE 0x50
#define R_RX_PL_WID 0x60
#define R_RX_PAYLOAD 0x61
#define W_TX_PAYLOAD 0xA0
#define W_ACK_PAYLOAD 0xA8 // and with ack pipe number
#define FLUSH_TX 0xE1
#define FLUSH_RX 0xE2
#define REUSE_TX_PL 0xE3
#define NOP 0xFF


/* Non-P omissions */
#define LNA_HCURR 0x01 //0


/* P model memory Map */
#define RPD 0x09


/* P model bit Mnemonics */
#define RF_DR_LOW 0x10 //5
#define RF_DR_HIGH 0x08 //3
#define RF_PWR_LOW 0x02 //1
#define RF_PWR_HIGH 0x04 //2

 

[KlausST]

Hi,

The nrf24l01 is not recommended for new designs.
Do you have the hardware to test it?

It is very hard only by reading the code to find a mistake when we don't know where exactly to keep the fucus.

Klaus

 

[Pran Kumar]

Hi Klaus,

I hav got this code from mikroelektronika under a subject quoted as "code for nrf24lo1+".So will this code work for nrf24lo1 as nrf24lo1+ is a different version,isn't it?Plz help if u have tried with this particular module.

Pran


Klaus