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Code for inserting 64 bit binary input

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fakeha_s

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I want to give input lets say binary value 11100001010001....... (64 bits) to my code how do i give this input to the board,as the ones and zeros are changing fast i don't think i can give these value from dip switch or push button the code will be running at 50Mhz it needs input to be given fast or am I misunerstanding and can give input bit stream from switches
I am using switches to give reset signal but that just needs to be given once here what do I do?
 

Re: input

u can write ur own vhdl synthesiable input block & download it with ur own circuit.

regards,
amr.
 

Re: input

I should write code as follows

module(data);
output data; declared as input or output
reg data;
data=64'b11000110100011....1101;
end module

this value of data would be given to my code as input?
 

Re: input

Do u want the input serial or parallel?
If in parallel your code is correct. & u wil coneect this output to ur input port.
It is better to show us the code of the other block u want to stimuli.

Regards,
amr.
 

    fakeha_s

    Points: 2
    Helpful Answer Positive Rating
Re: input

my code to which i want to give this input is as follows

always @( posedge clock)
begin
if(reset==0 & crc_enable==1)
begin
if(i>=0)
begin
message2=data;
i=i-1;
count=count+1;
message3[63:16]=message2[63:16];
message3[15:0]=16'b0;
end

further in the code data is not used now willt hat code work with this code are they both data here and in that code connected (as same variable name)or if i have to connect how do i do that
 

Re: input

from the code u take input as serial u need to modify ur code such that data is one bit & define a temporary variable of size 64 bits & each clock cycle u put one bit of it to the output
Regards,
Amr.
 

Re: input

module(data,clock,reset);
input clock,reset;
output data;
reg data;
reg [63:0]data_in;
integer i;

always@(posedge clock)
if(reset==0)
begin
i=63;
data_in=64'b110001010.........111;
end
else
begin
data=data_in;
i=i-1;
end

will this work
 

Re: input

Yes, it will work but do not forget the begin - end of the always block.

Regards,
Amr.
 

Re: input

i have written the file as follows
module inputdata(data_in,clock,reset);
input clock,reset;
output data_in;
reg data_in;
reg [63:0]data0,data1,data2;
integer i,j,k;
always @(posedge clock)

if(reset==1)
begin
i=63;
j=63;
k=63;
data0=64'b 110010100110111110011100011110000011111100001110;
data1=64'b 100010100110111110011100011110000011111100001110; //63rd bit
data2=64'b 110010100110011110011100011110000011111100001110; //52 bit

end
else if(reset==0)
begin
data_in=data0;
i=i-1;
if(i==-1)
begin
data_in= data1[j];
j=j-1;
end
if(i==-1 & j==-1)
begin
data_in=data2[k];
k=k-1;
end

end


endmodule

data0,data1.data2 are the three values which i want to give to the data_in ,I designed this code ucf file as well but defined only reset and clock signals and left data_in signal is this data_in signal connected with the input data_in in my verilog file ,i aded the bits files of my verilog code and this file,s bit file and the mcs file to the prom but when i ran the code no output appeared on leds
 

Re: input

The way you have declared it, your input has now become hardcoded.

I'd recommend that you input a serial stream of bits and buffer it. When the buffer is full (64 bits) then perform your operations. In this way you may be able to use the computer's serial port to input data but you will have to program an RS-232 interface. You may find an RS-232 interface on opencores.org maybe.
 

Re: input

I'd recommend that you input a serial stream of bits and buffer it. When the buffer is full (64 bits) then perform your operations. In this way you may be able to use the computer's serial port to input data but you will have to program an RS-232 interface. You may find an RS-232 interface on opencores.org maybe.


That is Serial In Parallel Out
 

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