Code for assigning internal clock of EP1C3 FPGA

[tooh83]

hi all
i m using EP1C3 FPGA, -8 speed grade , i want to assign its internal clock
as the input clk to a 4-bit counter whose VHDL code is as shown
entity counter is
port (
enable,clk : in std_logic;
count : out std_logic_vector(3 downto 0)
);
end counter;
architecture behave of counter is
signal inc : std_logic_vector(3 downto 0);
begin
process(clk,enable)
begin
if enable = '1' then
if (clk'event and clk='1') then
inc <= inc + 1;
count <= inc ;
end if;
end if;
end process;
end behave;

how can i do this ? thnx in advance

 

[vishwa]

fpga internal clock

Hi

FPGA doesn't have any internal clock signal. It has dedicated clock pins, from where the system clock can be connected to FPGA.

FPGA doesn't generate any clock signal internally.

 

[dewdrop]

fpga internal

you can use the pll in EP1C3 to generate the internal clock, but the numbers is limited.

 

[gliss]

ep1c3 development kit schematic

How can the FPGA generate a clock by itself?

 

[samcheetah]

does fpga have internal clock?

i dont know about altera FPGAs but for xilinx FPGAs you have to connect the clock input of your module to one of the GCLK inputs of the FPGA. there must be an external crystal oscillator connected to that pin. there must be something very simillar for altera FPGAs.

there is no such thing as internal clock of an FPGA. you have to have an external crystal connected to one of the global clock inputs. its only in simulation that you are able to generate an internal clock.

 

[sp]

ep1c3 and xilinx compare

you can use the pll in EP1C3 to generate the internal clock, but the numbers is limited.

pll is just used to multiply or divide the clk... it dont create the clk... FPGA still need a crystal to generate clk frequency...

FPGA dont hav internal clk...

but can we use "ring oscillator" to generate clk?.. hahhahaha....

regards,
sp

 

[salma ali bakr]

fpga internes clocking

so, if i am using a development kit for instance
i should connect the oscillator on it to the GCLK as input to the FPGA
and if i want to get different clocks, i should make a clock divider, ain't that right???

i heard about the DCM, what is it and can it be any helpful ???

thanks,
Salma

 

[samcheetah]

how to connect user clocks in fpga

if you have a development kit, the crystal will be connected to one of the global clock inputs. you will have to assign the clock pin of your HDL design to the pin to which the crystal is connected (one of the GCLK inputs) using the assign pins option of your software tool.

like for instance the crystal in the altium's livedesign evaluation kit is connected to the AA12 pin of the XC3S400 FPGA. using PACE, i assign the clock input of my verilog design to the AA12 pin.

if you want to get different clocks you could either connect another crystal to one of the global clock inputs. like for instance the Spartan 3 starter kit has a crystal socket in which you can insert another crystal. the other option is to use DCMs. there is alot of info about DCMs in the ISE documentation.

i hope that helps

 

[salma ali bakr]

fpga use clock

hi,

if i want to get different sampling frequencies by an ADC, then i should have different clocks to drive it with....should i use a clock divider i make (in VHDL for instance) to get these different frequencies or should i use the DCM (how will it be any different???)...

or it won't work at all and i should get oscillators on the board itself and use them

thanks,
Salma

 

[lonestar]

fpga clock connect pin

Hi Salma,
I think you can use DCM in FPGA to get clock with different frequency from the input global clock. DCM can generate "good" clocks for you.
Hope it helps.

 

[Iouri]

how to assign clock pin in xc3s400 fpga kit

to tooh83: What frequency do you want to run your counter?

 

[shankarmit]

frequency global clock fpga

fpga dont have internal clock.. but the board has builtin clock which goes for fpga..

just see the manual of the board you will the pin name where the clock enters int fpga..

if you assign that pin.. then that clock will propagate and your counter works.


Regards
Shankar
Tallika