boarensteinboars
Newbie

When we design an op-amp at the transistor level (CMOS), both inputs of the op-amp are biased at the same DC level. The output DC level, however, is not zero. The output is a certain level between Vdd and Vss.
What the op-amp really does is it amplifies the difference of changes in the + and - inputs into a large change/swing in the output.
vout=Aol(vinp-vinm)
and we use small v to signify AC or incremental signals in contrast with DC signals.
Then why do we use the following equation (with DC voltages):
Vout=Aol(Vinp-Vinm)
when designing op-amp circuits, say for ex.) a summing amplifier.
We use this equation together with KCL at the input nodes to calculate the closed loop gain. Then we let Aol tend to infinity.
This assumes that the output is normally zero with equal voltages at the input and output.
What the op-amp really does is it amplifies the difference of changes in the + and - inputs into a large change/swing in the output.
vout=Aol(vinp-vinm)
and we use small v to signify AC or incremental signals in contrast with DC signals.
Then why do we use the following equation (with DC voltages):
Vout=Aol(Vinp-Vinm)
when designing op-amp circuits, say for ex.) a summing amplifier.
We use this equation together with KCL at the input nodes to calculate the closed loop gain. Then we let Aol tend to infinity.
This assumes that the output is normally zero with equal voltages at the input and output.