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CMOS negative output impedance

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moein_peerooz

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dear friends
I have designed class F power amplifier based on TSMC 0.18um Technology using stacked structure.
but when i peak third harmonic traping circuit, the output of circuit in 4.7GHz(center freq) have a negative real impedance!!!
Is there any techniques to overcome this problem ?
Of course, I know the seris resistor could solve this problem; but the efficiency comes down!
 

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